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[招聘] Cadence SH 招聘Lead PV Design Engineer

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发表于 2013-8-9 18:16:52 | 显示全部楼层 |阅读模式

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Cadence SH 招聘Lead PV DesignEngineer

Ifyou have interest, PLS send your CV to zhangyl@cadence.com

更多职位信息敬请关注Cadence公众微信平台:Cadence_Recruitment


Job Title:
LeadPV Design Engineer

Job description:

1.
As an Encounter product validation engineer, he/she will contribute tooverall Encounter quality/stability and usability, enable designs easier tofinish design timing closure and chip finishing.

2.
Need to run different designs from placement/cts/optimization to finalSI timing closure, need to look at those timing degradations and analysis thereason, whether placement is not good, or optimization insert unreasonablebuffers, or routing pattern is detour, etc. Also need to analysis thosemax_tran/max_cap/DRC/power issues.

3.
Need to take new designs to add into regression suite. By given libraryand RTL netlist, she/he need to create floorplan, create powerplan, go throughAPR flow to achieve DRC clean and timing closure, to get reasonablePerformance/Power/Area metric, just like taping out designs.

4.
Can explore new flows or methodology to improve timing closureefficiency, and give customer support.


Positionrequirements:

1. Ph.D or excellent MS which is familiar with APR flow.

2. Good at STA. Know about place, routing, cts,optimization and SI analysis is a plus.

3. Know about RTL synthesis

4. Good at unix scripts, cshell. Perl is a plus

5. Strong ability in analysis and solving issues, strong ability infacing difficulty and challenges. Proactive in work.

6. Good English skill, communicationskill and good team work.



JobTitle:Lead PV Engineer


Position Description:

1.This job is an important addition to our R&D team todevelop Cadence Encounter Digital Implementation System (EDI)

2.Responsible for developing, applying, and improvingquality standard for Cadence EDI products

3.Required to acquire expertise and ownership over existingproduct components as well as develop brand new product features.

4.Help identifying new technology challenges in advancedprocess nodes and proactively provide the product improvement suggestion toR&D

5.Build up EDI expertise and deliver support to field teamand customers whenever needed


Position Requirements:         

1.CS/EE BS degree with 5+ years or MS degree with 3+ yearsof EDA or IC design related experience.

2.Good experience with Place and Route design flow using EDAtools. Good knowledge of LEF/DEF.

3.Be familiar with IC back-end design flow, from netlist togdsout.

4.Strong analysis/bedbug capability for technical issues, bedetailed oriented with a focus on quality.

5.Good team player with strong written and verbalcommunication skills.

6.Be able to work under pressure, be able to work onmultiple projects at the same time.

7.Good English read, write and communication Skill.

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