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[招聘] NO.86-Senior Physical Design Engineer(Beijing)

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发表于 2013-5-17 16:32:56 | 显示全部楼层 |阅读模式

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Position Tasks, Duties and Responsibilities
The ASIC Physical Design Engineer will:
•         Perform full synthesis (RTL synthesis, place & route) of standard cell IC.
•         Perform library, IP, and IC design service evaluation and selection.
•         Complete third party IP integration and ensure vendor guidelines are followed.
•         Work with front-end engineers to resolve problems and achieve design closure.
•         Adhere to established design methodology and contribute to its continuous improvement
•         Use scripting languages, configuration management, batch processing, and other techniques to ensure design quality and minimize turnaround time

Candidate Qualifications:
Candidate must:
•         Hold BSEE (MS preferred).
•         Have minimum of 7 years hands-on experience in full flow IC back-end physical design and verification
•         Project management skills including scheduling, resource management, and progress reporting
•         Have completed hierarchical IC projects in 65 nm and below.
•         Have the ability to independently identify and resolve design, tool, and flow problems
•         Be able to design and implement physical design strategies and methodologies for deep submicron designs.
•         Be able to complete block and chip level tapeout quality LVS and DRC
Any of the following is beneficial:
•         STA constraint design
•         Equivalence checking – RTL to gates, and gates to gates
Tasks include all aspects of the physical design flow such as:
•         RTL synthesis
•         IC physical design flow
•         Floorplanning and power grid implementations
•         Hierarchical design partitioning
•         Placement of standard cells
          Scan insertion / scan chain reordering
•         Analog IP integration
•         Power and IR drop analysis
•         Clock tree synthesis
•         Routing
•         Parasitic extraction
•         Timing verification
•         Timing improvements for critical macro blocks
•         Timing closure
•         Noise analysis
•         DFM analysis and improvement
•         Signoff LVS/DRC
•         Implementation of post tapeout ECO changes

KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“KT人才”微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!(关注成功后输入”KT“即可查询职位!)
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