DV Engineer

jingli888ca

Contact: jingli888ca@163.com for further information
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Key Responsibility:
With increase in ASIC design complexity, verification becomes a important aspect of the design flow. The candidate will be working in the areas of multimedia ASIC design and verification. This position requires the candidate to work closely with the ASIC designers on understanding the functional block being designed; compose test plan and validation vectors to ensure functional completeness according to the design specification; perform formal verification on the design; write test vectors for simulation and emulation; and develop test programs.

Skilled and Experience Requirement:
1. M.S/B.S. in electrical engineering or computer engineering or Bachelor in electrical engineering with minimum 3 years of working experience. (Required)
2. 2-5 years of digital circuit design and verification experience. (Optional)
3. Design knowledge of high-speed datapath and state machines (both logic design and circuit design). (Required)
4. Experience with circuit design verification methodologies (Optional)
5. Familiar with Verilog, C and C++ (Required)
6. Scripting/programming experience (Required)
7. Strong plus: (Optional)
• MPEG2, MPEG4, H.263, H.264 or VC-1 codec developing experience;
• Knowledge of system security and encrypt/decrypt
• Other useful experience: HDTV, ATSC, DVB, DVD, DV, knowledge of analog TV encoding/decoding