synopsys苏州 PnR招聘

jinyige

Description:

·Digital layout design for blocks and chips;

·RTL synthesis and static timing analysis;

·DRC&LVS checks;

·Timing Lib generation;

·Documentation of design procedures;

·Work towards improving efficiency in design procedures and methodologies;

·Communicate effectively with other team members.

Requirements:

·Knowledge of IC design/EDA tools (ICC, astro ...), technical documentation, utilities;

·Shell/Perl/Python script language programming skill in Unix/Linux environment;

·Has strong desires to learn and explore new technologies and demonstrates good analysis and problem-solving skills;

·Must have a Bachelor degree in EE/CS; Master degree is a plus;

·Good English skills to work in an English language environment.

icfbicfb

不会吧，苏州?

bsaqycx

同质疑！！！

jinyige

09年被synopsys收购的，原先是MIPS的，再之前是chipidea
欢迎有兴趣的加入~~

killyou_6

毛，联系方式都没，

jinyige

感兴趣的话，请把中英文简历发到yqian@synopsys.com

hsim

chipidea 苏州点还没撤。。。。 现在有多少人啊？

js_shen

关注中