【社会招聘】全球著名美资IC公司LSI上海研发中心2011年12月热招职位！！！

yulingyanyuyu

LSI上海研发中心正在扩张，目前有很多职业发展机会，欢迎有志之士加入！有意者，请将简历发至：Tracey.zheng@lsi.com

如有任何疑问，请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709.

也可加我msn: zql975504@hotmail.com

或者微博啊：http://weibo.com/1752448637/profile?topnav=1&wvr=3.6  

LSI上海研发中心位于徐汇区中山南二路徐汇苑大厦（8万人体育场对面）

1.
Digital Design Engineer-Shanghai

Job Responsibilities

Working with an Architecture/Algorithm Development Team to finalize system architecture

for optimal implementation of digital signal processing algorithms, including architectural

definition and tradeoffs, die size, power estimation.

Skill required:

Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification,

formal verification and static timing analysis. Unix shell, Perl scripting, C/RTL co-simulation.

Sound theory background  of communication and Digital signal processing.

2.
Analog Layout-Shanghai

Job Responsibilities
- Layout high speed analog and mixed-signal custom chips for the hard disk drive industry
- Work directly with a team of engineers to determine floor plan, routing and I/O requirements for preamp IC's
- Perform IC design rule and connectivity verification and drive products through mask release flows.
- Contribute to methodology improvements to increase layout and verification efficiency.

Requirements/Qualifications (Education)

- Bachelor's degree in Electrical Engineering (or related field) or equivalent experience
- Minimum three to five years experience in custom analog IC physical design
- Experience with schematic-driven layout, floor planning, chip level routing, design for manufacturing and design rule and connectivity verification is required
- Experience using Cadence Virtuoso XL and VCAR router preferred
- Familiarity with both analog and digital layout tools and flows, circuit design concepts and IC manufacturing processes desired

3.
Verification Design Engineer-Shanghai

Job Responsibilities
Duties will include working with a Verification Team to develop reusable block and system level verification environment using high level verification language to support
ASIC development.
Review RTL architectural and implementation specifications. Develop test plan, create stimulus drivers, monitors, reference models, scoreboards, protocol checkers to verify
function and performance of advanced multiprotocol networking ASICs.
Define and develop application tests required to verify ASICs meet functional and performance goals.
Define and implement functional coverage plans.
Define and implement code coverage plans. Develop testing and regression
methodologies for new verification flow.
Coordinate test plan implementation and
regressions with remote team.
Incorporate reusability into all aspects of the verification environment.
Develop/maintain/enhance environment tools/scripts/makefiles.

Required:
- Minimum of 3-5 years ASIC verification experience in a product development environment
- Proven ASIC Design Verification skills
- Proficient with high level verification languages such as System Verilog and Specman e.
- Knowledge of data and telecommunication networking
- Proficient with one or more scripting languages, such as Shell, Perl and TCL.
- Superior debugging skills for large ASIC designs
- Strong written and verbal communication skills
- Adaptable to evolving customer requirements
- Experience in a lead position giving guidance to other engineers, tracking and overseeing development progress.

Education/Certifications:
Required Degree: BS
Preferred Degree: MS
Preferred Major: Electrical Engineering or related discipline

4.
Sr. Verification Engineer –Shanghai

Job Responsibilities

Duties will include working with a Verification Team to develop reusable block and system level verification environment using high level verification language to support ASIC development. Review RTL architectural and implementation specifications. Develop test plan, create stimulus drivers, monitors, reference models, scoreboards, protocol checkers to verify function and performance of advanced multiprotocol networking ASICs. Define and develop application tests required to verify ASICs meet functional and performance goals. Define and implement functional coverage plans. Define and implement code coverage plans. Develop testing and regression methodologies for new verification flow. Coordinate test plan implementation and regressions with remote team. Incorporate reusability into all aspects of the verification environment. Develop/maintain/enhance environment tools/scripts/makefiles. LSI Corporation is a leading provider of innovative silicon, systems and software technologies that enable products which seamlessly bring people, information and digital content together. We offer a broad portfolio of capabilities and services including custom and standard product ICs, adapters, systems and software that are trusted by the world's best known brands to power leading solutions in the storage and networking markets. We value the diversity of our people. LSI is an Equal Opportunity Employer.

Functional/Industry Knowledge:

Required: - ASIC Design and Verification skills and experience - Knowledge of high level verification languages such as SystemVerilog - Knowledge of data and telecommunication networking - Scripting skills, such as Shell, Perl and TCL - Good written and verbal communication skills Education/Certifications: Required Degree: MS Preferred Major: Electrical Engineering or related discipline

5.

Preamp Verification Engineer -Shanghai

Job Description

LSI Corporation is known worldwide as a storage market leader. Our silicon-to-systems solutions empower disk drives with the intelligence, flexibility, speed and reliability needed for high-capacity storage across every market segment, from portable consumer electronics devices to personal computers to enterprise-class storage systems and networks. LSI's Storage Peripherals Division is seeking an experienced verification design engineer to join the pre-amplifier design team. Preamp design team members define, create, modify and verify high-speed custom integrated circuits for hard disk drive (HDD) and tape recording products using leading edge CMOS and BiCMOS technologies

- Work with a Preamp Development team to create verilog testbench components and simulation environment.

- Create product test plans, test cases and perform simulation and debug of Storage Preamp mixed-signal devices.

- Must be experienced with Verilog and Verilog AMS and knowledgeable with functional coverage methodologies.

- Ability to follow a disciplined verification methodology and work closely with a multi-location, international design team.

- Excellent teamwork and communication skills are required.

Requirements/Qualifications (Education)

- Preferred degree in Electrical or Electronic Engineering.

- BS required, MS or Ph.D. preferred

- The ideal candidate will have 5 years of experience as a member of a Design Verification team

- Experience with successful tapeout of SoC products from verification plan to sign-off including verification plan, reusable test bench development, random-constrained test case creation, RTL/Gate level simulation/debug, code/functional coverage analysis and regression

- Conversant with Verilog, SystemVerilog, Specman, Perl/Python/Tcl scripts, Makefile and EDA tools

- Experience with Assertion or Formal Verification a plus

- Strong communication skills (must be proficient in both spoken and written English)

- Able to travel internationally (to United States and throughout Asia

- Understanding of silicon process technologies (CMOS and Bipolar) and device physics would be a plus.

- Conversant with Verilog-AMS/Verilog-A and Analog Behavior Modeling would be a plus

- Proven analytical skills (application of math and physics to solve problems)

6.
Design Validation Engineer -Shanghai

JOB DESCRIPTION:

-
This position is part of the LSI’s world-leading head-to-host recording system design validation team, and focus on high speed pre-amplifier validation and debug.

-
Set up bench test equipment and perform characterization measurements on high speed(>4GHz) mixed signal IC's, paying careful attention to measurement accuracy and repeatability and test condition coverage

-
Design and layout evaluation PCBs, paying careful attention to high speed signals and board component parasitic

-
Develop automated scripts and program test equipment to automate data collection and report generation. Where automated measurements are not practical, manual data collection is to be performed

-
Work with design and other characterization teams in design verification and characterization and errata corrective action, as well as work with program management, test and product engineering to insure timely delivery of fully verified silicon

-
Support bench application engineers with in-depth customer specific measurements and failure analysis

-
Organize bench data into technical reports for reference and presentation. Presentation of data to both internal and external customers

-
Manage local subcontractors that perform flip chip and board assembly. Work with program management, design, test and product engineering as part of a product support team to insure timely delivery of fully validated silicon.

PREFERRED EXPERIENCE:

-
Investigative and analytical mindset, with a strong interest in electronics and technical work

-
A thorough knowledge of electronic circuits and systems with practical experience in analog and digital electronic circuit design and debug

-
Experience or background with one of the following areas is preferred

a)
Experiences in RF, high-speed connector(SATA, DDR etc), gesture recognition or storage system(HDD, Flash etc) measurement

b)
Experiences in Cadence Allegro HDL(Concept) PCB development. Allegro layout experience is a plus

c)
Developing the automation programming: VBS, Labview & TestStand. IVI driver coding experience is a strong plus

d)
Complete the FPGA design with 200MHz+ data paths before

-
Expertise in applied magnetism and recording a strong plus

-
Good communication skills, especially in technical writing and reporting

7.
ASIC Customer Engineer-Shanghai

Job Description

- LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs.

Requirements/Qualifications (Education)

Education: BS/MS Electrical, Computer Engineering or Equivalent

- Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply:

- RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design

- implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC

- environments. This would include strategies for power management.

- OR

Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus.

- Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus.

- OR

- Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus.

- OR

- DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes