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Working within the application-specific integrated
circuit (ASIC) industry, time to market is very
important. With very deep submicron (VDSM)
processes, issues with timing enclosure, cell
placement efficiency, the antenna effect, signal integrity, etc.,
have impacted our ability to meet market requirements in a
timely manner. By focusing on the design process, two of the
major issues, the antenna problem and cell placement
efficiency, can be addressed. I propose using knowledge-based
priority placement (KBPP), which utilizes design knowledge to
simplify those two issues [2], [10].
abbr_a88aa03243adab5fbff1a836b447ba21.pdf
(2.98 MB, 下载次数: 178 )
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发表于 2011-5-21 02:35:42