猎头：：某上海知名外企招聘资深硬件工程师（ 绝对高薪，只要你有能力 )

hacker_pig

Job Title: Hardware Engineer (ASIC/FPGA Design Engineer)

Note:
-        The job description below is for a Senior ASIC/FPGA Design Engineer
-        Looking for
o        2 Senior ASIC/FPGA Design Engineer, and
o        3 ASIC/FPGA Design Engineer

Job Description
-        Fully define an FPGA/ASIC design based on high-level functional requirements
-        Document and review top-level and block architectures
-        Implement blocks in Verilog RTL
-        Synthesize and close timing on the design
-        Work closely with Design Verification team to review strategy, testplans and assist with debugs
-        Work on code-coverage analysis, top-level connections, etc.
-        For FPGA designs, perform back-end placement and routing
-        Assist in lab bring-up, using logic-analyzer tools
-        Adherence to process and sound methodology

Skills Required
-        7+ years experience in FPGA and/or ASIC logic design
-        Ability to translate high-level functions into block designs
-        Outstanding coding and scripting skills (Verilog, C, Perl)
-        Demonstrated knowledge in FPGA/ASIC physical aspects (placement, routing, PLL, I/O, memories, etc.)
-        Experience with industry tools for synthesis, timing analysis
-        Outstanding written and spoken communication skills
-        Experience in mentoring junior designers
-        Well organized and Process oriented
-        Knowledge of Ethernet is a plus

Educational Background
Requires MSEE/CS combined with 5+ years of related experience or BSEE/CS combined with 7+ yrs related experience.







Job Title:  Hardware Engineer (ASIC/FPGA Design Verification Engineer)

Note:
-        The job description below is for a Senior ASIC/FPGA Design Verification Engineer
-        Looking for
o        3 Senior ASIC/FPGA Design Verification Engineer
o        6 ASIC/FPGA Design Verification Engineer

Job Description:
Participate in architecture and design verification of complex networking ASIC.  Responsibilities include:
-        Architecture/Micro-Architecture definition
-        Standalone and Integrated functional verification;
-        Documentation and review of Verification architecture and testplans
-        Develop verification environment (models, checkers, packet manager) using Specman/Vera
-        Develop random, pseudo-random and directed tests
-        Establish verification effectiveness using assertion/functional/code coverage and code reviews
-        RTL and gates simulation, debug and root cause
-        Regression triage and debug
-        Formal verification and equivalence checking.
-        Lab debug and design validation

Skills required:
-        Prior significant verification experience on complex ASICs.  
-        Good background in networking concepts.  
-        Experience with Vera/Specman and Verilog.  
-        Chip and system and test experience.  
-        Programming and scripting skills.
-        Good planning skills (well partioned designs, well organized code)
-        Outstanding written and verbal communication skills
-        Capability of critical thinking, challenging design intent

Education:
MSEE with 5+ yrs or BSEE/CS  with 7+ yrs relevant experience







.  
Job Title:  HW Engineer (System Board Design Engineer)
Note:
-        The job description below is for a Senior System Board Design Engineer
-        Looking for
o        1 Senior System Board Design Engineer
o        3 System Board Design Engineer

Job Description:
-        Participates on a project team of engineers involved in the specification, design, development and test of hardware for leading core routing products.
-        Design hardware solutions and work in the team to develop boards.
-        Participate in definition, design, and debug of GSR next-generation SP products.
-        Works under department strategy and direction.
-        Translates department goals into own work assignments.
-        Independently determines and develops approach to solutions.
-        Work is reviewed upon completion for adequacy in meeting objectives.
-        Interfaces cross-functionally at the working team level.
-        Work under direction of the project leader with ASIC and Mechanical Engineering, Diagnostic and Software teams to define features and participate in problem resolution.
-        Work closely with diagnostics and software developers throughout the development process.
-        Job involves set up and monitoring EDVT units.

Skills required:
-        Prefer experience in embedded CPUs,  memory architectures, and FPGA technology.
-        Experience with DVT process is critical.
-        Experience with, FPGA simulation or design verification techniques are all a plus.
-        Requires excellent communication skills.
-        Mentors junior team members.
-        Tackles complex issues in creative ways.
-        Problem solving requires originality and ingenuity using knowledge gained while specializing in field.
-        Self motivation, teamwork and strong communication skills are essential
-        Additional skills would be having the capability of proficiency with spice (or equivalent) circuit simulation, field-solver and time/frequency domain analysis, familiarity with high speed serdes design, PLL design and LVDS, LVPECL, CML and other high-performance I/O technologies.
-        Experience correlating simulation results with lab measurements using oscilloscopes, TDRs and spectrum analyzers is a plus.

Education:
MSEE with 5+ yrs or BSEE/CS  with 7+ yrs relevant experience

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若您感兴趣，请发信到 hacker_pig@tom.com   
你敢挑战具有绝对诱惑的高薪吗，那就来尝试吧。
请确保你有过人的专业能力，高薪只提供给那些有能力的人。

老扁

有上海房价那么高吗？一个月能买一平米的一品汤还可以考虑一下哈，哈哈。

开个玩笑。

hacker_pig

只要公司认为值那个价，肯定会给你个满意的价格。

bryan_wang

不知道这些信息的来源啊~~~
我是做数字逻辑设计的,想去国外找工作,不知道容易不容易

captain1983

这些东西．．．真不真实不重要，最重要的话是你会几样？和你自己的水平问题了．

lyman98

工作经验要求很高啊

4213154

哎，初学者就不去了

ppywindy

中国有能力的人还是挺多的，不过许多做好了之后会选择外企，这是与国家有关系问题吧！