【急招】Staff ASIC Design Engineer (Display_IP)--上海

doudouha

DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:

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Develop and maintain display ip for various products.

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Work on synthesis, static timing analysis and formal verification.

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Work together with physical design team, own timing closure and assist to floor plan.

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Proactively develop achievable delivery schedules including net list, directed verification.

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Regression and random testing on RTL and gates, code coverage, power simulation.

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Asynchronous clock boundary crossing analysis and ECO process.

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Debugging complex system level simulations.

                                                                                                               
PREFERRED EXPERIENCE:

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Bachelor/Master Degree in Electrical or Computer Engineering.

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Proven ASIC / SoC Design Experience (5+ years as a bachelor,4+ years as a master).

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Advanced RTL coding techniques.

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Experience on synthesis, timing analysis and formal verification.

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Strong background of Display specific-interconnection protocols (DisplayPort, LVDS, VGA,HDCP, DVI, HDMI etc).

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Display and Video/Multimedia experience would be an asset.

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Design for verification (assertion based design strategies, code coverage, functional coverage, test plan etc.)

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Hardware emulation, Computer System Performance modeling and analysis

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Strong verbal and written communication skills.

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Strong problem solving skills.

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Ability to be flexible in terms of responsibilities and hours.

工作地点：张江高科

薪水面议

有意者请尽快将个人简历发送至carol.ha@usense.com.cn

谢谢~~~

semi_yanyu0

ding!!!!!!!!!!

semi_yanyu0

ding!!!!!!!!!!