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[资料] PTPX进行功耗分析 PTSI PTOCV 资料

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发表于 2017-4-13 11:01:04 | 显示全部楼层 |阅读模式

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本帖最后由 Horizon00 于 2017-4-13 11:11 编辑

PrimeTime PX进行功耗分析

PTPX is used to accurately analyze power dissipation with PT. PrimeTime PX supports a gate-level netlist only.
Power = Leakage Power + Dynamic Power(internal power and switching power).
You can use the following power analysis techniques with PrimeTimePX:
1. Averaged power analysis
For purely averaged power analysis, PrimeTime PX supports propagation of switching activity based on defaults, user-defined switching, or switching derived from an hdl simulation (either RTL or gate level).
2. Time-based power analysis
For extremely accurate analysis of power with respect to time,PrimeTime PX supports analysis based on the RTL or gate-level simulation activity over time.
PrimeTime PX uses an event-driven algorithm to calculate the powerconsumption for each event. Detailed time-based power waveforms are generatedto provide both average and peak power results. The tool can produce an average and peak power report.
Required Files descriptions:
Gate-Level Netlist
Technology Library
PTPX supports either CCS(composite current source) or NLPM(nonlinear power model).
You use the power_model_preference nlpm | ccs variable to specifyyour power model preference when the library contains both NLPM and CCS data.The default is ccs.
SDC File
The SDC file contains the design constraints. The driver cellinformation is used to calculate the transition time on the primaryinputs.
Parasitic File
Switching Activity
In the averaged power analysis, you use either SAIF or VCD file formats to read the switching activity. If you do not specify switching activity information, the tool assumes certain default values for theswitching activity.
In time-based power analysis, you use VCD file formats to read the switching activity.
When you read a SAIF file or an RTL VCD file for power estimation,use the set_rtl_to_gate_name command to map the RTL and gate-level object names. This command is especially necessary if you have performed only the RTL simulation for generating the backward SAIF file. Because the RTL object names can change after synthesis, the read_saif or read_vcd command is not able to map the names present in the RTL SAIF or VCD fileto the gate-level objects, which can result in inaccurate results. You can avoid this by using the set_rtl_to_gate_name command.
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