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[招聘] 上海需要一位Package Design Engineer

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发表于 2017-1-10 15:55:38 | 显示全部楼层 |阅读模式

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【猎头职位:上海需要一位Package Design Engineer】联系人:Estelle-Lv,邮箱:hr@kthr.com,微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!

Summary of Role:

Package Design Engineer is responsible for large scale asic package definition, package model extraction, system-module SI/PI co-simulation and thermal/reliability solution. Support ASIC chip designs on IO planning based on 32nm, 14nm and beyond technology. Manage ASIC package laminate design from definition to manufacture. Explore advanced package solutions such as 2.5D, 3D package.

Responsibilities:

Work scope includes but not limited to:

1Package solution consulting and evaluation during project bid stage

2Define package netlist based on chip-package co-design methodology

3IO planning together with physical designer

4Package ERC checking, package design file checking

5Support customer on system-module SI/PI co-simulation

6Package design sign-off

7Develope package design methodology in China Design Center

8Develope advanced 2.5D, 3D package design solution.

The candidate would also have future extended responsibility participating in the design planning and sizing for the advanced ASIC/SoC chips, deployment and other application engineering support of the design methodology.

Requirements:   

1EE/ME/CS related background in system/chip design

2Solid knowledge and industry experience in following areas:

Ø
High speed package/system design experience (High Speed Serdes, DDR, etc.)

Ø
Multiple layers PCB/Laminate (4+) layout experience (Experience with automation and SKILL language programming is a plus)

Ø
Familiar with Industry SI/PI analysis process, system level modeling and tools (SigXp, Spice, MATLAB etc).

3Good grasp of Perl/TCL scripts under Linux/Unix environment. C programming will be a plus

4Good communication skill in both English and Mandarin, and willingness to work with a global team. Skill in other languages is a plus

5Understanding of ASIC physical design process/tools, advanced semiconductor technology process and device physics is a plus

6Strong teamwork sense, good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment.

Preferred Qualifications:

1Direct PKG engineer role with industry experience.

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