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卷 Fdisk 的文件夹 PATH 列表
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\---ISSCC2021
+---S
| | I2021_S03D Highlighted Chip Releases Modern Digital SoCs.rar
| | I2021_S04D Processors.rar
| | I2021_S09D ML Processors From Cloud to Edge.rar
| | I2021_S13D Cyro-CMOS for Quantum Computing.rar
| | I2021_S15D Compute-in-Memory Processors for Deep Neural Networks.rar
| | I2021_S16D Computation in Memory.rar
| | I2021_S24D Advanced Embedded Memories.rar
| | I2021_S25D DRAM.rar
| | I2021_S29D Digital Circuits for Computing, Clocking and Power Management.rar
| | I2021_S30D Non-Volatile Memories.rar
| |
| +---I2021_S02D Highlighted Chip Releases 5G and Radar Systems
| | I2021_02.01D mm-Wave 5G Radios Baseband to Waves.pdf
| | I2021_02.02D High-Performance and Small Form-Factor mm-Wave CMOS Radars for Automotive and Industrial Sensing in 76-to-81GHz and 57-to-64GHz Bands.pdf
| | I2021_02.03D SOLI a Tiny Device for a New Human Machine Interface.pdf
| | I2021_S02D Highlighted Chip Releases 5G and Radar Systems.pdf
| |
| +---I2021_S05D ANALOG INTERFACES
| | I2021_05.01D A 1.5μW 0.135pJ?%RH2 CMOS Humidity Sensor Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array.pdf
| | I2021_05.02D Capacitance-to-Digital Converter for Operation Under Uncertain Harvested Voltage down to 0.3V with No Trimming, Reference and Voltage Regulation.pdf
| | I2021_05.03D A Highly Digital 2210μm2 Resistor-Based Temperature Sensor with a 1-Point Trimmed Inaccuracy of ±1.3°C (3σ) from -55°C to 125°C in 65nm CMOS.pdf
| | I2021_05.04D A Hybrid Thermal-DiffusivityResistor-Based Temperature Sensor with a Self-Calibrated Inaccuracy of ±0.25°C (3σ) from ?55°C to 125°C.pdf
| | I2021_05.05D A 770 kSs Duty-Cycled Integrated-Fluxgate Magnetometer for Contactless Current Sensing.pdf
| | I2021_05.06D A 25A Hybrid Magnetic Current Sensor with 64mA Resolution, 1.8MHz Bandwidth, and a Gain Drift Compensation Scheme.pdf
| | I2021_05.07D A MEMS Coriolis Mass Flow Sensor with 300μgh√HzResolution and ±0.8mgh Zero Stability.pdf
| | I2021_05.08D A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique.pdf
| | I2021_S05D ANALOG INTERFACES.pdf
| |
| +---I2021_S06D High-Performance Receivers and Transmitters for Sub-6GHz Radios
| | I2021_06.01D A Low-Power and Low-Cost 14nm FinFET RFIC SupportingLegacy Cellular and 5G FR1.pdf
| | I2021_06.02D A 4-Way Doherty Digital Transmitter Featuring 50%-LO Signed IQ Interleave Upconversion with more than 27dBm Peak Power and 40% Drain Effici.pdf
| | I2021_06.03D A 0.9V Dual-Channel Filtering-by-Aliasing Receiver Front-EndAchieving +35dBm IIP3 and ?81dBm LO Leakage SupportingIntra- and Inter-Band Car.pdf
| | I2021_06.04D A 1-to-3GHz Co-Channel Blocker Resistant, Spatially and Spectrally Passive MIMO Receiver in 65nm CMOS with +6dBm In-BandIn-Notch B1dB.pdf
| | I2021_06.05D A 3dB-NF 160MHz-RF-BW Blocker-Tolerant Receiver with Third-Order Filtering for 5G NR Applications.pdf
| | I2021_06.06D Full-Duplex Receiver with Wideband Multi-Domain FIR Cancellation Based on Stacked-Capacitor, N-Path Switched-Capacitor Delay Lines Achievin.pdf
| | I2021_06.07D A 1.75dB-NF 25mW 5GHz Transformer-Based Noise-Cancelling CMOS Receiver Front-End.pdf
| | I2021_S06D High-Performance Receivers and Transmitters for Sub-6GHz Radios.pdf
| |
| +---I2021_S07D Imagers and Range Sensors
| | I2021_07.01D A 4-tap 3.5μm 1.2Mpixel Indirect Time-of-Flight CMOS Image Sensor with Peak Current Mitigation and Multi-User Interference Cancellation.pdf
| | I2021_07.02D A 48×40 13.5mm Depth Resolution Flash LiDAR Sensor with In-Pixel Zoom Histogramming Time-to-Digital Converter.pdf
| | I2021_07.03D A 189×600 Back-Illuminated Stacked SPAD Direct Time-of-Flight Depth Sensor for Automotive LiDAR Systems.pdf
| | I2021_07.04D A 256×128 3D-Stacked (45nm) SPAD FLASH LiDAR with 7-Level Coincidence Detection and Progressive Gating for 100m Range and 10klux Background Light.pdf
| | I2021_07.05D A 250fps 124dB Dynamic-Range SPAD Image Sensor Stacked with Pixel-Parallel Photon Counter Employing Sub-Frame Extrapolating Architecture for Motion Artifact Suppression.pdf
| | I2021_07.06D A High-Speed Back-Illuminated Stacked CMOS Image Sensor with Column-Parallel kTC-Cancelling S&H and Delta-Sigma ADC.pdf
| | I2021_07.07D A 0.2-to-3.6TOPSW Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection.pdf
| | I2021_07.08D A 1-inch 17Mpixel 1000fps Block-Controlled Coded-Exposure Back-Illuminated Stacked CMOS Image Sensor for Computational Imaging and Adaptive Dynamic Range Control.pdf
| | I2021_07.09D 12.74-inch 32Mpixel-Prototype CMOS Image Sensor with 0.64μm Unit Pixels Separated by Full-Depth Deep-Trench Isolation.pdf
| | I2021_S07D Imagers and Range Sensors.pdf
| |
| +---I2021_S08D ULTRA-HIGH-SPEED WIRELINE
| | I2021_08.01D A 224Gbs DAC-Based PAM-4 Transmitter with 8-Tap FFE in10nm CMOS.pdf
| | I2021_08.02D An Output-Bandwidth-Optimized 200Gbs PAM-4 100Gbs NRZ Transmitter with 5-Tap FFE in 28nm CMOS.pdf
| | I2021_08.03D An 8b DAC-Based SST TX Using Metal Gate Resistors with 1.4pJb Efficiency at 112Gbs PAM-4 and 8-Tap FFE in 7nm CMOS.pdf
| | I2021_08.04D A 116Gbs DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJb at 45dB Loss in PAM-4Duo-PAM-4 and 52dB in PAM-2.pdf
| | I2021_08.05D A Scalable Adaptive ADCDSP-Based 1.25-to-56Gbps112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm.pdf
| | I2021_08.06D A Highly Reconfigurable 40-97GSs DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJconv-step for 400Gbs Coherent Optical Applications in 7nm FinFET.pdf
| | I2021_08.07D A 112Gbs ADC-DSP-Based PAM-4 Transceiver for Long-Reach Applications with 40dB Channel Loss in 7nm FinFET.pdf
| | I2021_08.08D A 112Gbs PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver.pdf
| | I2021_S08D ULTRA-HIGH-SPEED WIRELINE.pdf
| |
| +---I2021_S10D Continuous-Time ADCs and DACs
| | I2021_10.01D A 116μW 104.4dB-DR 100.6dB-SNDR CT ΔΣ Audio ADC Using Tri-Level Current-Steering DAC with Gate-Leakage Compensated Off-Transistor-Based Bias Noise Filter.pdf
| | I2021_10.02D A 139μW 104.8dB-DR 24kHz-BW CTΔΣM with Chopped AC-Coupled OTA-Stacking and FIR DACs.pdf
| | I2021_10.03D A 100MHz-BW 68dB-SNDR Tuning-Free Hybrid-Loop DSM with an Interleaved Bandpass Noise-Shaping SAR Quantizer.pdf
| | I2021_10.04D A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR.pdf
| | I2021_10.05D A 12b 600MSs Pipelined SAR and 2×-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET.pdf
| | I2021_10.06D A 12b 16GSs RF-Sampling Capacitive DAC for Multi-Band Soft-Radio Base-Station Applications with On-Chip Transmission-Line Matching Network in 16nm FinFET.pdf
| | I2021_10.07D A 64GSs 4×-Interpolated 1b Semi-Digital FIR DAC for Wideband Calibration and BIST of RF-Sampling AD Converters.pdf
| | I2021_S10D Continuous-Time ADCs and DACs.pdf
| |
| +---I2021_S11D ADVANCED WIRELINE LINKS AND TECHNIQUES
| | I2021_11.01D A 1.7pJb 112Gbs XSR Transceiver for Intra-Package Communication in 7nm FinFET Technology.pdf
| | I2021_11.02D A 26.5625-to-106.25Gbs XSR SerDes with 1.55pJb Efficiency in 7nm CMOS.pdf
| | I2021_11.03D A 480Gbsmm 1.7pJb Short-Reach Wireline Transceiver Using Single-Ended NRZ for Die-to-Die Applications.pdf
| | I2021_11.04D A High-Accuracy Multi-Phase Injection-Locked 8-Phase 7GHz Clock Generator in 65nm with 7b Phase Interpolators for High-Speed Data Links.pdf
| | I2021_11.05D A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET.pdf
| | I2021_11.06D A 100Gbs -8.3dBm-Sensitivity PAM-4 Optical Receiver with Integrated TIA, FFE and Direct-Feedback DFE in 28nm CMOS.pdf
| | I2021_11.07D A 56Gbs 50mW NRZ Receiver in 28nm CMOS.pdf
| | I2021_11.08D An Echo-Cancelling Front-End for 112Gbs PAM-4 Simultaneous Bidirectional Signaling in 14nm CMOS.pdf
| | I2021_11.09D A 105Gbs Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler.pdf
| | I2021_S11D ADVANCED WIRELINE LINKS AND TECHNIQUES.pdf
| |
| +---I2021_S14D MM-Wave Transceivers for Communication and Radar
| | I2021_14.01D A 71-to-86GHz Packaged 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver in 28nm CMOS.pdf
| | I2021_14.02D An Early Fusion Complementary RADAR-LiDAR TRX in 65nm CMOS Supporting Gear-Shifting Sub-cm Resolution for Smart Sensing and Imaging.pdf
| | I2021_14.03D A 26GHz Full-Duplex Circulator Receiver with 53dB400MHz (40dB800MHz) Self-Interference Cancellation for mm-Wave Repeaters.pdf
| | I2021_14.04D A 24-to-30GHz Double-Quadrature Direct-Upconversion Transmitter with Mutual-Coupling-Resilient Series-Doherty Balanced PA for 5G MIMO Arrays.pdf
| | I2021_14.05D A 1V W-Band Bidirectional Transceiver Front-End with 1dBTR Switch Loss, 1°dB PhaseGain Resolution and 12.3%TX PAE at 15.1dBm Output Power in 65nm CMOS Te.pdf
| | I2021_14.06D A 76-to-81GHz 2×8 FMCW MIMO Radar Transceiver with FastChirp Generation and Multi-Feed Antenna-in-Package Array.pdf
| | I2021_14.07D An Adaptive Analog Temperature-Healing Low-Power 17.7-to-19.2GHz RX Front-End with ±0.005dB°C Gain Variation, 1.6dB NF Variation, and 2.2dB IP1dB Variati.pdf
| | I2021_14.08D A Fully Integrated 62-to-69GHz Crystal-Less Transceiver with 12 Channels Tuned by a Transmission-Line-Referenced FLL in 0.13μm BiCMOS.pdf
| | I2021_S14D MM-Wave Transceivers for Communication and Radar.pdf
| |
| +---I2021_S17D DC-DC Converters
| | I2021_17.01D A Two-Stage Cascaded Hybrid Switched-Capacitor DC-DC Converter with 96.9% Peak Efficiency Tolerating 0.6Vμs Input Slew Rate During Startup.pdf
| | I2021_17.02D A Masterless Fault-Tolerant Hybrid Dickson Converter with 95.3% Peak Efficiency 20V-to-60V Input and 3.3V Output for 48V Multi-Phase Automotive Applications.pdf
| | I2021_17.03D A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators.pdf
| | I2021_17.04D Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing.pdf
| | I2021_17.05D A 98.2%-Efficiency Reciprocal Direct Charge Recycling Inductor-First DC-DC Converter.pdf
| | I2021_17.06D A Reconfigurable DC-DC Converter for Maximum TEG Energy Harvesting in a Battery-Powered Wireless Sensor Node.pdf
| | I2021_17.07D A 0.03mVmA Low Crosstalk and 185nA Ultra-Low-Quiescent Single-Inductor Multiple-Output Converter Assisted by 5-Input Operational Amplifier for 94.3% Peak Efficiency and 3.0W Driving Cap.pdf
| | I2021_17.08D A 90.5%-Efficiency 28.7μVRMS-Noise Bipolar-Output High-Step-Up SC DC-DC Converter with Energy-Recycled Regulation and Post-Filtering for ±15V TFT-Based LAE Sensors.pdf
| | I2021_17.09D A High-Conversion-Ratio and 97.4% Peak-Efficiency 3-Switch Boost Converter with Duty-Dependent Charge Topology for 1.2A High Driving Current and 20% Reduction of Inductor DC Current in.pdf
| | I2021_S17D DC-DC Converters.pdf
| |
| +---I2021_S18D Biomedical Devices, Circuits, and Systems
| | I2021_18.01D An Optically-Addressed Nanowire-Based Retinal Prosthesis with 73% RF-to-Stimulation Power Efficiency and 20nC-to-3μC Wireless Charge Telemetering.pdf
| | I2021_18.02D CMOS-Driven Pneumatic-Free Scalable Microfluidics and Fluid Processing with Label-Free Cellular and Bio-Molecular Sensing Capability for an End-to-End Point-of-.pdf
| | I2021_18.03D An Integrated Thermal ActuationSensing Array with Stacked Oscillators for Efficient and Localized Heating of Magnetic Nanoparticles with Sub-Millimeter Spatial.pdf
| | I2021_18.04D A Wireless Multimodality System-on-a-Chip with Time-BasedResolution Scaling Technique for Chronic Wound Monitoring.pdf
| | I2021_S18D Biomedical Devices, Circuits, and Systems.pdf
| |
| +---I2021_S19D Optical Systems for Emerging Applications
| | I2021_19.01D Optical Phased-Array FMCW LiDAR with On-Chip Calibration.pdf
| | I2021_19.02D A Mechanically Flexible Implantable Neural Interface for Computational Imaging and Optogenetic Stimulation over 5.4×5.4mm2 FoV.pdf
| | I2021_19.03D A MEMS-Based Dynamic Light Focusing System for Single-Cell Precision in Optogenetics.pdf
| | I2021_S19D Optical Systems for Emerging Applications.pdf
| |
| +---I2021_S20D HIGH PERFORMANCE VCOS
| | I2021_20.01D A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBcHz Peak FoM and 90-to-180kHz 1f3 PN Corner Without Harmonic Tuning.pdf
| | I2021_20.02D A 3.09-to-4.04GHz Distributed-Boosting and Harmonic-Impedance-Expanding Multi-Core Oscillator with -138.9dBcHz at 1MHz Offset and 195.1dBcHz FoM.pdf
| | I2021_20.03D A 60GHz 186.5dBcHz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS.pdf
| | I2021_S20D HIGH PERFORMANCE VCOS.pdf
| |
| +---I2021_S21D UWB Systems and Wake-Up Receivers
| | I2021_21.01D A 1.125Gbs 28mW 2m-Radio-Range IR-UWB CMOS Transceiver.pdf
| | I2021_21.02D A 3-to-10GHz 180pJb IEEE802.15.4z4a IR-UWB Coherent Polar Transmitter in 28nm CMOS with Asynchronous Amplitude Pulse-Shaping and Injection-Locked Phase Modulation.pdf
| | I2021_21.03D A Fully Integrated 2.7μW -70.2dBm-Sensitivity Wake-Up Receiver with Charge-Domain Analog Front-End, -16.5dB-SIR, FEC and Cryptographic Checksum.pdf
| | I2021_21.04D A 0.75-to-1GHz Passive Wideband Noise-Cancelling 171μW Wake-Up RX and 440μW Primary RX FE with -86dBm10kbs Sensitivity, 35dB SIR and 3.8dB RX NF.pdf
| | I2021_21.05D An Integrated 2.4GHz -91.5dBm-Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency.pdf
| | I2021_S21D UWB Systems and Wake-Up Receivers.pdf
| |
| +---I2021_S22D Terahertz for Communication and Sensing
| | I2021_22.01D THz Prism One-Shot Simultaneous Multi-Node Angular Localization Using Spectrum-to-Space Mapping with 360-to-400GHz Broadband Transceiver and Dual-Port Integrated.pdf
| | I2021_22.02D A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS.pdf
| | I2021_22.03D A 0.42THz Coherent TX-RX System Achieving 10dBm EIRP and 27dB NF in 40nm CMOS for Phase-Contrast Imaging.pdf
| | I2021_22.04D A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution.pdf
| | I2021_S22D Terahertz for Communication and Sensing.pdf
| |
| +---I2021_S23D THz Circuits and Front-Ends
| | I2021_23.01D 270-to-300GHz Double-Balanced Parametric Upconverter Using Asymmetric MOS Varactors and a Power-Splitting-Transformer Hybrid in 65nm CMOS.pdf
| | I2021_23.02D A 436-to-467GHz Lens-Integrated Reconfigurable RadiatingSource with Continuous 2D Steering and Multi-BeamOperations in 65nm CMOS.pdf
| | I2021_23.03D A 605GHz 0.84mW Harmonic Injection-Locked Receiver Achieving 2.3pW√Hz NEP in 28nm CMOS.pdf
| | I2021_23.04D An 82fsrms-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector in 65nm CMOS.pdf
| | I2021_S23D THz Circuits and Front-Ends.pdf
| |
| +---I2021_S26D RF Power-Amplifier and Front-End Techniques
| | I2021_26.01D A 26-to-60GHz Continuous Coupler-Doherty Linear Power Amplifier for Over-An-Octave Back-Off Efficiency Enhancement.pdf
| | I2021_26.02D A Doherty-Like Load-Modulated Balanced Power Amplifier Achieving 15.5dBm Average Pout and 20% Average PAE at a Data Rate of 18Gbs in 28nm CMOS.pdf
| | I2021_26.03D A mm-Wave Power Amplifier for 5G Communication Using a Dual-Drive Topology Exhibiting a Maximum PAE of 50% and Maximum DE of 60% at 30GHz.pdf
| | I2021_26.04D A Reflection-Coefficient Sensor for 28GHz Beamforming Transmitters in 22nm FD-SOI CMOS.pdf
| | I2021_26.05D A Watt-Level Quadrature SwitchedFloated-Capacitor Power Amplifier with Back-Off Efficiency Enhancement in Complex Domain Using Reconfigurable Self-Coupling Ca.pdf
| | I2021_26.06D A 5-to-6GHz Current-Mode Subharmonic Switching Digital Power Amplifier for Enhancing Power Back-Off Efficiency.pdf
| | I2021_26.07D An Impedance-Transforming N-Path Filter Offering Passive Voltage Gain.pdf
| | I2021_S26D RF Power-Amplifier and Front-End Techniques.pdf
| |
| +---I2021_S27D Discrete-Time ADCs
| | I2021_27.01D A 250kHz-BW 93dB-SNDR 4th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering.pdf
| | I2021_27.02D 14.1-ENOB 184.9dB-FoM Capacitor-Array-Assisted Cascaded Charge-Injection SAR ADC.pdf
| | I2021_27.03D A 13.8-ENOB 0.4pF-CIN 3rd-Order Noise-Shaping SAR in a Single-Amplifier EF-CIFF Structure with Fully Dynamic Hardware-Reusing kTC Noise Cancelation.pdf
| | I2021_27.04D A 0.4-to-40MSs 75.7dB-SNDR Fully Dynamic Event-Driven Pipelined ADC with 3-Stage Cascoded Floating Inverter Amplifier.pdf
| | I2021_27.05D An 80MHz-BW 640MSs Time-Interleaved Passive Noise-Shaping SAR ADC in 22nm FDSOI Process.pdf
| | I2021_27.06D A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration.pdf
| | I2021_27.07D A 79dB-SNDR 167dB-FoM Bandpass ΔΣ ADC Combining N-Path Filter with Noise-Shaping SAR.pdf
| | I2021_S27D Discrete-Time ADCs.pdf
| |
| +---I2021_S28D Biomedical Systems
| | I2021_28.01D A Distortion-Free VCO-Based Sensor-to-Digital Front-End Achieving 178.9dB FoM and 128dB SFDR with a Calibration-Free Differential Pulse-Code Modulation Technique.pdf
| | I2021_28.02D A 400-to-1000nm 24μW Monolithic PPG Sensor with 0.3AW Spectral Responsivity for Miniature Wearables.pdf
| | I2021_28.03D A 28μW 134dB DR 2nd-Order Noise-Shaping Slope Light-to-Digital Converter for Chest PPG Monitoring.pdf
| | I2021_28.04D A 400mVpp 92.3dB-SNDR 1kHz-BW 2nd-Order VCO-Based ExG-to-Digital Front-End Using a Multiphase Gated-Inverted Ring-Oscillator Quantizer.pdf
| | I2021_28.05D A 0.6V0.9V 26.6-to-119.3μW ΔΣ-Based Bio-Impedance Readout IC with 101.9dB SNR and 0.1Hz 1f Corner.pdf
| | I2021_28.06D A 22.6μW Biopotential Amplifier with Adaptive Common-Mode Interference Cancelation Achieving Total-CMRR of 104dB and CMI Tolerance of 15Vppin 0.18μm CMOS.pdf
| | I2021_28.07D A 0.00378mm2 Scalable Neural Recording Front-End for Fully Immersible Neural Probes Based on a Two-Step Incremental Delta-Sigma Converter with Extended Counting and Hardware Reuse.pdf
| | I2021_28.08D Multi-Modal Peripheral Nerve Active Probe and Microstimulator with On-Chip Dual-Coil PowerData Transmission and 64 2nd-Order Opamp-Less ΔΣ ADCs.pdf
| | I2021_S28D Biomedical Systems.pdf
| |
| +---I2021_S31D Analog Techniques
| | I2021_31.01D An 82mW ΔΣ-Based Filter-Less Class-D Headphone Amplifier with -93dB THD+N, 113dB SNR and 93% Efficiency.pdf
| | I2021_31.02D A 0.9V 28MHz Dual-RC Frequency Reference with 5pJCycle and ±200ppm Inaccuracy from -40°C to 85°C.pdf
| | I2021_31.03D A 0.14mm2 16MHz CMOS RC Frequency Reference with a 1-Point Trimmed Inaccuracy of ±400ppm from ?45°C to 85°C.pdf
| | I2021_31.04D A Chopper-Stabilized Amplifier with -107dB IMD and 28dB Suppression of Chopper-Induced IMD.pdf
| | I2021_S31D Analog Techniques.pdf
| |
| +---I2021_S32D FREQUENCY SYNTHESIZERS
| | I2021_32.01D A 365fsrms-Jitter and ?63dBc-Fractional Spur 5.3GHz-Ring-DCO-Based Fractional-N DPLL Using a DTC SecondThird-Order Nonlinearity Cancelation and a Probability-Density-Shaping ΔΣM.pdf
| | I2021_32.02D A 14nm Analog Sampling Fractional-N PLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter and 93fs at Near-Integer Channels.pdf
| | I2021_32.03D A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter.pdf
| | I2021_32.04D A 104fsrms-Jitter and ?61dBc-Fractional Spur 15GHzFractional-N Subsampling PLL Using a Voltage-DomainQuantization-Error Cancelation Technique.pdf
| | I2021_32.05D A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHzμs Slope.pdf
| | I2021_32.06D A K-Band 12.1-to-16.6GHz Subsampling ADPLL with 47.3fsrms Jitter Based on a Stochastic Flash TDC and Coupled Dual-Core DCO in 16nm FinFET CMOS.pdf
| | I2021_32.07D A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.pdf
| | I2021_32.08D A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays.pdf
| | I2021_S32D FREQUENCY SYNTHESIZERS.pdf
| |
| +---I2021_S33D High-Voltage, GaN and Wireless Power
| | I2021_33.01D A Fully Integrated GaN-on-Silicon Gate Driver and GaN Switchwith Temperature-compensated Fast Turn-on Technique forImproving Reliability.pdf
| | I2021_33.02D A 600V GaN Active Gate Driver with Dynamic Feedback Delay Compensation Technique Achieving 22.5% Turn-On Energy Saving.pdf
| | I2021_33.03D An Automotive-Use 2MHz 100VOUT Flicker-Free Frequency-Modulated GaN-Based Buck-Boost LED Driver Achieving Bootstrap Charge Balancing and 16.8dBμV Radiated EMI Noise.pdf
| | I2021_33.04D An 8A 998Ainch3 90.2% Peak Efficiency 48V-to-1V DC-DC Converter Adopting On-Chip Switch and GaN Hybrid Power Conversion.pdf
| | I2021_33.05D A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mWmm2 Power Density.pdf
| | I2021_33.06D A Wireless Power Transfer System with Up-to-20% Light-Load Efficiency Enhancement and Instant Dynamic Response by Fully Integrated Wireless Hysteretic Control for Bi.pdf
| | I2021_33.07D A Frequency-Splitting-Based Wireless Power and Data Transfer IC for Neural Prostheses with Simultaneous 115mW Power and 2.5Mbs Forward Data Delivery.pdf
| | I2021_33.08D A Decentralized Daisy-Chain-Controlled Switched-Capacitor Driver for Microrobotic Actuators with 10× Power-Reduction Factor and Over 300V Drive Voltage.pdf
| | I2021_33.09D A Hybrid Switching Supply Modulator Achieving 130MHz Envelope-Tracking Bandwidth and 10W Output Power for 2G3GLTENR RF Power Amplifiers.pdf
| | I2021_S33D High-Voltage, GaN and Wireless Power.pdf
| |
| +---I2021_S34D Emerging Imaging Solutions
| | I2021_34.01D An 8960-Element Ultrasound-on-Chip for Point-of-Care Ultrasound.pdf
| | I2021_34.02D A 21pJframepixel Imager and 34pJframepixel Image Processor for a Low-Vision Augmented-Reality Smart Contact Lens.pdf
| | I2021_34.03D A 32×32 Pixel 0.46-to-0.75THz Light-Field Camera SoC in 0.13μm CMOS.pdf
| | I2021_34.04D An Energy-Replenishing Ultrasound Pulser with 0.25CV2f Dynamic Power Consumption.pdf
| | I2021_S34D Emerging Imaging Solutions.pdf
| |
| +---I2021_S35D Adaptive Digital Techniques for Variation Tolerant Systems
| | I2021_35.01D An Octa-Core 2.82GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC.pdf
| | I2021_35.02D A 0.021mm2 PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Po.pdf
| | I2021_35.03D Thread-Level Power Management for a Current- and Temperature-Limiting System in a 7nm HexagonTM Processor.pdf
| | I2021_S35D Adaptive Digital Techniques for Variation Tolerant Systems.pdf
| |
| \---I2021_S36D Hardware Security
| I2021_36.01D Unified In-Memory Dynamic TRNG and Multi-Bit Static PUF Entropy Generation for Ubiquitous Hardware Security.pdf
| I2021_36.02D An EMPower SCA-Resilient AES-256 with Synthesizable Signature Attenuation Using Digital-Friendly Current Source and RO-Bleed-Based Integrated Local Feedback and Global Switched-Mode Co.pdf
| I2021_36.03D A Modeling Attack Resilient Strong PUF with Feedback-SPN Structure Having 0.73% Bit Error Rate Through In-Cell Hot-Carrier Injection Burn-In.pdf
| I2021_36.04D A Physically Unclonable Function Combining a ProcessMismatch Amplifier in an Oscillator Collapse Topology.pdf
| I2021_36.05D An Automatic Self-Checking and Healing Physically Unclonable Function (PUF) with 3×10-8 Bit Error Rate.pdf
| I2021_S36D Hardware Security.pdf
|
\---V
| I2021_S03V Highlighted Chip Releases Modern Digital SoCs.rar
| I2021_S04V Processors.rar
| I2021_S09V ML Processors From Cloud to Edge.rar
| I2021_S13V Cyro-CMOS for Quantum Computing.rar
| I2021_S15V Compute-in-Memory Processors for Deep Neural Networks.rar
| I2021_S16V Computation in Memory.rar
| I2021_S24V Advanced Embedded Memories.rar
| I2021_S25V DRAM.rar
| I2021_S29V Digital Circuits for Computing, Clocking and Power Management.rar
| I2021_S30V Non-Volatile Memory.rar
|
+---I2021_S02V Highlighted Chip Releases
| I2021_02.01V mm-Wave 5G Radios Baseband to Waves.pdf
| I2021_02.02V High-Performance and Small Form-Factor mm-Wave CMOS Radars for Automotive and Industrial Sensing in 76-to-81GHzand 57-to-64GHz Bands.pdf
| I2021_02.03V SOLI a Tiny Device for a New Human-Machine Interface.pdf
| I2021_S02V Highlighted Chip Releases.pdf
|
+---I2021_S05V ANALOG INTERFACES
| I2021_05.01V A 1.5μW 0.135pJ·%RH2 CMOS Humidity Sensor Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array.pdf
| I2021_05.02V Capacitance-to-Digital Converter for Operation Under Uncertain Harvested Voltage down to 0.3V with No Trimming, Reference and Voltage Regulation.pdf
| I2021_05.03V A Highly Digital 2210μm2 Resistor-Based Temperature Sensor with a 1-Point Trimmed Inaccuracy of ±1.3°C (3σ) from -55°C to 125°C in 65nm CMOS.pdf
| I2021_05.04V A Hybrid Thermal-DiffusivityResistor-Based Temperature Sensor with a Self-Calibrated Inaccuracy of 0.25°C (3σ) from ?55°C to 125°C.pdf
| I2021_05.05V A 770 kSs Duty-Cycled Integrated-Fluxgate Magnetometer for Contactless Current Sensing.pdf
| I2021_05.06V A 25A Hybrid Magnetic Current Sensor with 64mA Resolution, 1.8MHz Bandwidth, and a Gain Drift Compensation Scheme.pdf
| I2021_05.07V A MEMS Coriolis Mass Flow Sensor with 300μgh√Hz Resolution and ±0.8mgh Zero Stability.pdf
| I2021_05.08V A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique.pdf
| I2021_S05V ANALOG INTERFACES.pdf
|
+---I2021_S06V High-Performance Receivers and Transmitters for Sub-6GHz Radios
| I2021_06.01V A Low-Power and Low-Cost 14-nm FinFET RFIC Supporting Legacy Cellular and 5G FR1.pdf
| I2021_06.02V A 4-Way Doherty Digital Transmitter Featuring 50%-LO Signed IQ Interleave Up-conversion with more than 27dBm Peak Power and 40% Drain Efficie.pdf
| I2021_06.03V A 0.9V Dual-Channel Filtering-by-AliasingReceiver Front-End Achieving +35dBm IIP3and ?81dBm LO Leakage Supporting IntraandInter-Band Carrier.pdf
| I2021_06.04V A 1-to-3GHz Co-Channel Blocker Resistant, Spatially and Spectrally Passive MIMO Receiver in 65nm CMOS with +6dBm In-BandIn-Notch B1dB.pdf
| I2021_06.05V A 3dB-NF 160MHz-RF-BW Blocker-Tolerant Receiver with Third-Order Filtering for 5G NR Applications.pdf
| I2021_06.06V Full-Duplex Receiver with Wideband Multi-Domain FIR Cancellation Based on Stacked-Capacitor, N-Path Switched-Capacitor Delay Lines Achieving.pdf
| I2021_06.07V A 1.75dB NF 25mW 5GHz Transformer-Based Noise-Cancelling CMOS Receiver Front-End.pdf
| I2021_S06V High-Performance Receivers and Transmitters for Sub-6GHz Radios.pdf
|
+---I2021_S07V Imagers and Range Sensors
| I2021_07.01V A 4-tap 3.5μm 1.2Mpixel Indirect Time-of-Flight CMOS Image Sensor with Peak Current Mitigation and Multi-User Interference Cancellation.pdf
| I2021_07.02V A 48×40 13.5mm Depth Resolution Flash LiDAR Sensor with In-Pixel Zoom Histogramming Time-to-Digital Converter.pdf
| I2021_07.03V A 189 × 600 Back-Illuminated Stacked SPAD Direct Time-of-Flight Depth Sensor for Automotive LiDAR Systems.pdf
| I2021_07.04V A 256×128 3D-Stacked (45nm) SPAD FLASH LiDAR with 7-Level Coincidence Detection and Progressive Gating for 100m Range and 10klux Background Light.pdf
| I2021_07.05V A 250fps 124dB Dynamic-Range SPAD Image Sensor Stacked with Pixel-Parallel Photon Counter Employing Subframe Extrapolating Architecture for Motion Artifact Suppression.pdf
| I2021_07.06V A High-Speed Back-Illuminated Stacked CMOS Image Sensor with Column-Parallel kTC Cancelling S&H and Delta-Sigma ADC.pdf
| I2021_07.07V A 0.2-to-3.6TOPSW Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection.pdf
| I2021_07.08V A 1-inch 17Mpixel 1000fps Block-Controlled Coded-Exposure Back-Illuminated Stacked CMOS Image Sensor for Computational Imaging and Adaptive Dynamic Range Control.pdf
| I2021_07.09V 12.74” 32Megapixel-Prototype CMOS Image Sensor with 0.64μm Unit Pixels Separated by Full-Depth Deep-Trench Isolation.pdf
| I2021_S07V Imagers and Range Sensors.pdf
|
+---I2021_S08V ULTRA-HIGH-SPEED WIRELINE
| I2021_08.01V A 224Gbs DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS.pdf
| I2021_08.02V An Output Bandwidth Optimized 200Gbs PAM-4 100Gbs NRZ Transmitter with 5-Tap FFE in 28nm CMOS.pdf
| I2021_08.03V An 8b DAC-based SST TX using metal gate resistors with 1.4pJb efficiency at 112GbsPAM4 and 8-taps FFE in 7nm CMOS.pdf
| I2021_08.04V A 116Gbs DSP based Wireline Transceiver in 7nm CMOS achieving 6pJbit at 45dB Loss in PAM-4Duo-PAM-4 and 52dB in PAM-2.pdf
| I2021_08.05V A Scalable Adaptive ADCDSP-Based 1.25-to-56Gbps112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm.pdf
| I2021_08.06V A Highly Reconfigurable 40-97GSs DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJconv-step for 400Gbs Coherent Optical Applications in 7nm FinFET.pdf
| I2021_08.07V A 112Gbs ADC-DSP-Based PAM-4 Transceiver for Long-Reach Applications with 40dB Channel Loss in 7nm FinFET.pdf
| I2021_08.08V A 112Gbs PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver.pdf
| I2021_S08V ULTRA-HIGH-SPEED WIRELINE.pdf
|
+---I2021_S10V Continuous-Time ADCs and DACs
| I2021_10.01V A 116μW 104.4dB-DR 100.6dB-SNDR CT ΔΣ Audio ADC using Tri-level Current-Steering DAC with Gate-Leakage Compensated Off-Transistor Based Bias Noise Filter.pdf
| I2021_10.02V A 139μW 104.8dB-DR 24kHz-BW CTΔΣM with Chopped AC-coupled OTA-Stacking and FIR DACs.pdf
| I2021_10.03V A 100MHz-BW 68dB-SNDR Tuning-Free Hybrid-Loop DSM with an Interleaved Bandpass Noise-Shaping SAR Quantizer.pdf
| I2021_10.04V A 3.7mW 12.5MHz-BW 81dB-SNDR 4th-order CTDSM with Single-OTA and 2nd-order NS-SAR.pdf
| I2021_10.05V A 12b 600MSs Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET.pdf
| I2021_10.06V A 12b 16GSs RF-Sampling Capacitive DAC for Multi-Band Soft-Radio Base-Station Applications with On-Chip Transmission-Line Matching Network in 16nm FinFET.pdf
| I2021_10.07V A 64GSs 4x-interpolated 1b Semi-Digital FIR DAC for Wideband Calibration and BIST of RF-Sampling AD-Converters.pdf
| I2021_S10V Continuous-Time ADCs and DACs.pdf
|
+---I2021_S11V ADVANCED WIRELINE LINKS AND TECHNIQUES
| I2021_11.01V A 1.7-pJb 112Gbps XSR Transceiver for Intra-package Communication in 7nm FinFET technology.pdf
| I2021_11.02V A 26.5625Gbps to 106.25Gbps XSR SerDes with 1.55pJbit efficiency in 7nm CMOS.pdf
| I2021_11.03V A 480Gbsmm 1.7pJb Short-Reach Wireline Transceiver Using Single-Ended NRZ for Die-to-Die Applications.pdf
| I2021_11.04V A High-Accuracy Multi-Phase Injection-Locked 8-Phase 7GHz Clock Generator in 65nm with 7b Phase Interpolators for High-Speed Data Links.pdf
| I2021_11.05V A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in10nm FinFET.pdf
| I2021_11.06V A 100Gbs -8.3dBm-Sensitivity PAM-4 Optical Receiver with Integrated TIA, FFE and Direct Feedback DFE in 28nm CMOS.pdf
| I2021_11.07V A 56-Gbs 50-mW NRZ Receiverin 28-nm CMOS.pdf
| I2021_11.08V An Echo-Cancelling Front-End for 112Gbs PAM4 Simultaneous Bidirectional Signaling in 14nm CMOS.pdf
| I2021_11.09V A 105 Gbs Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler.pdf
| I2021_S11V ADVANCED WIRELINE LINKS AND TECHNIQUES.pdf
|
+---I2021_S14V MM-Wave Transceivers for Communication and Radar
| I2021_14.01V A 71-86 GHz Packaged 16-Element by 16-Beam Multi-User BeamformingIntegrated Receiver in 28nm CMOS.pdf
| I2021_14.02V An Early Fusion Complementary RADAR-LiDAR TRX in 65nm CMOS Supporting Gear-Shifting Sub-cm Resolution for Smart Sensing and Imaging.pdf
| I2021_14.03V A 26-GHz Full-Duplex Circulator Receiver with 53dB400MHz (40dB800MHz) Self-Interference Cancellation for mm-Wave Repeaters.pdf
| I2021_14.04V A 24-to-30GHz Double-Quadrature Direct-Upconversion Transmitter with Mutual-Coupling-Resilient Series-Doherty Balanced PA for 5G MIMO Arrays.pdf
| I2021_14.05V A 1V W-Band Bidirectional Transceiver Front-end with 1 dB TR Switch Loss, 1°dB PhaseGain Resolution and 12.3% TX PAE at 15.1dBm Output Power in 65-nm CMOS.pdf
| I2021_14.06V A 76-81 GHz 2x8 FMCW MIMO Radar Transceiver with Fast Chirp Generation and Multi-Feed Antenna-in-Package Array.pdf
| I2021_14.07V An Adaptive Analog Temperature-Healing Low-Power 17.7-to-19.2GHz RX Front-End with ±0.005dB°C Gain Variation, 1.6dB NF Variation, and 2.2dB IP1dB Variation.pdf
| I2021_14.08V A Fully Integrated 62-69GHz Crystal-Less Transceiver with 12 Channels Tuned by a Transmission-Line-Referenced FLL in 0.13μm Bi-CMOS.pdf
| I2021_S14V MM-Wave Transceivers for Communication and Radar.pdf
|
+---I2021_S17V DC-DC Converters
| I2021_17.01V A Two-Stage Cascaded Hybrid Switched Capacitor DC-DC Converter With 96.9% Peak Efficiency Tolerating 0.6Vμs Input Slew Rate During Startup.pdf
| I2021_17.02V A Masterless Fault-Tolerant Hybrid Dickson Converter with 95.3% Peak Efficiency 20V-to-60V Input and 3.3V Output for 48V Multi-Phase Automotive Applications.pdf
| I2021_17.03V A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators.pdf
| I2021_17.04V Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing.pdf
| I2021_17.05V A 98.2%-Efficiency Reciprocal Direct Charge Recycling Inductor-First DC-DC Converter.pdf
| I2021_17.06V A Reconfigurable DC-DC Converter for Maximum TEG Energy Harvesting in a Battery-Powered Wireless Sensor Node.pdf
| I2021_17.07V A 0.03mVmA Low Crosstalk and 185nA Ultra-Low Quiescent Single-Inductor Multiple-Output Converter Assisted by 5-Input Operational Amplifier for 94.3% Peak Efficiency and 3.0W Driving Capab.pdf
| I2021_17.08V A 90.5%-Efficiency 28.7μVRMS-Noise Bipolar-Output High Step-Up SC DC-DC Converter with Energy-Recycled Regulation and Post-Filtering for ±15V TFT-Based LAE Sensors.pdf
| I2021_17.09V A High Conversion Ratio and 97.4% Peak-Efficiency 3-Switch Boost Converter with Duty-Dependent Charge Topology for 1.2A High Driving Current and 20% Reduction of Inductor DC Current in Mi.pdf
| I2021_S17V DC-DC Converters.pdf
|
+---I2021_S18V Biomedical Devices, Circuits, and Systems
| I2021_18.01V An Optically-Addressed Nanowire-Based Retinal Prosthesis with 73% RF-to-Stimulation Power Efficiency and 20nC-3μC Wireless Charge Telemetering.pdf
| I2021_18.02V CMOS-Driven Pneumatic-Free Scalable Microfluidics and Fluid Processing with Label-Free Cellular and Bio-Molecular Sensing Capability for an End-to-End Point-of-Ca.pdf
| I2021_18.03V An Integrated Thermal ActuationSensing Array with Stacked Oscillators for Efficient and Localized Heating of Magnetic Nanoparticles with Sub-Millimeter Spatial Re.pdf
| I2021_18.04V A Wireless Multimodality System-on-a-chip with Time-based Resolution Scaling Technique for Chronic WoundMonitoring.pdf
| I2021_S18V Biomedical Devices, Circuits, and Systems.pdf
|
+---I2021_S19V Optical Systems for Emerging Applications
| I2021_19.01V Optical Phased Array FMCW LiDAR with On-Chip Calibration.pdf
| I2021_19.02V A Mechanically Flexible, Implantable Neural Interface for Computational Imaging and Optogenetic Stimulation over 5.4x5.4mm2 FoV.pdf
| I2021_19.03V A MEMS-based Dynamic Light Focusing System for Single-cell Precision in Optogenetics.pdf
| I2021_S19V Optical Systems for Emerging Applications.pdf
|
+---I2021_S20V HIGH PERFORMANCE VCOS
| I2021_20.01V A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBcHz Peak FoM and 90-to-180kHz 1f3 PN Corner without Harmonic Tuning.pdf
| I2021_20.02V A 3.09-to-4.04GHz Distributed-Boosting and Harmonic-Impedance-Expanding Multi-Core Oscillator with -138.9dBcHz at 1MHz Offset and 195.1dBcHz FoM.pdf
| I2021_20.03V A 60GHz 186.5dBcHz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS.pdf
| I2021_S20V HIGH PERFORMANCE VCOS.pdf
|
+---I2021_S21V UWB Systems and Wake-Up Receivers
| I2021_S21V UWB Systems and Wake-Up Receivers.pdf
|
+---I2021_S22V Terahertz for Communication and Sensing
| I2021_22.01V THz Prism One-Shot Simultaneous Multi-Node Angular Localization Using Spectrum-to-Space Mapping with 360-to-400GHz Broadband Transceiver and Dual-Port Integrated Le.pdf
| I2021_22.02V A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS.pdf
| I2021_22.03V A 0.42THz Coherent TX-RX System Achieving 10dBm EIRP and 27dB NF in 40nm CMOS for Phase-Contrast Imaging.pdf
| I2021_22.04V A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution.pdf
| I2021_S22V Terahertz for Communication and Sensing.pdf
|
+---I2021_S23V THz Circuits and Front-Ends
| I2021_23.01V 270-to-300GHz Double-Balanced Parametric Upconverter Using Asymmetric MOS Varactors and a Power-Splitting-Transformer Hybrid in 65nm CMOS.pdf
| I2021_23.02V A 436-to-467GHz Lens-Integrated Reconfigurable Radiating Source with Continuous 2D Steering and Multi-Beam Operations in 65nm CMOS.pdf
| I2021_23.03V A 605GHz 0.84mW Harmonic Injection-Locked Receiver Achieving 2.3pW√Hz NEP in 28nm CMOS.pdf
| I2021_23.04V An 82fsRMS-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector in 65nm CMOS.pdf
| I2021_S23V THz Circuits and Front-Ends.pdf
|
+---I2021_S26V RF Power-Amplifier and Front-End Techniques
| I2021_26.01V A 26-to-60GHz Continuous Coupler-Doherty Linear Power Amplifier for Over-An-Octave Back-Off Efficiency Enhancement.pdf
| I2021_26.02V A Doherty-Like Load-Modulated Balanced Power Amplifier Achieving 15.5dBm Average Pout and 20% Average PAE at a Data Rate of 18Gbs in 28nm CMOS.pdf
| I2021_26.03V A mm-Wave Power Amplifier for 5G Communication Using a Dual-Drive Topology Exhibiting a Maximum PAE of 50% and Maximum DE of 60% at 30GHz.pdf
| I2021_26.04V A Reflection-Coefficient Sensor for 28GHz Beamforming Transmitters in 22nm FD-SOI CMOS.pdf
| I2021_26.05V A Watt-Level Quadrature SwitchedFloated Capacitor Power Amplifier with Back-off Efficiency Enhancement in Complex Domain Using Reconfigurable Self-Coupling Canc.pdf
| I2021_26.06V A 5-to-6GHz Current-Mode Subharmonic Switching Digital Power Amplifier for Enhancing Power Back-Off Efficiency.pdf
| I2021_26.07V An Impedance-Transforming N-Path Filter Offering Passive Voltage Gain.pdf
| I2021_S26V RF Power-Amplifier and Front-End Techniques.pdf
|
+---I2021_S27V Discrete-Time ADCs
| I2021_24.01V A 250kHz-BW 93dB-SNDR 4th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering.pdf
| I2021_27.02V 14.1-ENOB 184.9-dB FoM Capacitor Array-Assisted Cascaded Charge-Injection SAR ADC.pdf
| I2021_27.03V A 13.8-ENOB 0.4pF-CIN 3rd – Order Noise Shaping SAR in a Single Amp EF-CIFF Structure with Fully Dynamic Hardware-Reusing kTC Noise Cancellation.pdf
| I2021_27.04V A 0.4-to-40MSs Fully Dynamic Event-Driven Pipelined ADC with 3-Stage Cascoded Floating Inverter Amplifier.pdf
| I2021_27.05V An 80MHz-BW 640MSs Time-Interleaved Passive Noise-Shaping SAR ADC in 22nm FDSOI Process.pdf
| I2021_27.06V A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration.pdf
| I2021_27.07V A 79dB-SNDR 167dB-FoM Bandpass ΔΣ ADC Combining N-Path Filter with Noise-Shaping SAR.pdf
| I2021_S27V Discrete-Time ADCs.pdf
|
+---I2021_S28V Biomedical Systems
| I2021_28.01V A Distortion-Free VCO-Based Sensor-to-Digital Front-End Achieving 178.9dB FoM and128dB SFDR with a Calibration-Free Differential Pulse-Code Modulation Technique.pdf
| I2021_28.02V A 400-to-1000nm 24μW Monolithic PPG Sensor with 0.3AW Spectral Responsivity for Miniature Wearables.pdf
| I2021_28.03V A 28μW 134dB DR 2nd-Order Noise-Shaping Slope Light-to-Digital Converter for Chest PPG Monitoring.pdf
| I2021_28.04V A 400mVpp 92.3dB-SNDR 1kHz-BW 2nd-Order VCO-Based ExG-to-Digital Front-End Using a Multiphase Gated-Inverted Ring-Oscillator Quantizer.pdf
| I2021_28.05V A 0.6V0.9V 26.6μW-to-119.3μW ΔΣ-Based Bio-Impedance Readout IC with 101.9 dB SNR and 0.1 Hz-1f-Corner.pdf
| I2021_28.06V A 22.6μW Biopotential Amplifier with Adaptive Common-Mode Interference Cancellation Achieving Total-CMRR of 104dB and CMI Tolerance of 15VPP in 180nm CMOS.pdf
| I2021_28.07V A 0.00378mm2 Scalable Neural Recording Front-End for Fully Immersible Neural Probes based on a Two-Step Incremental Delta-Sigma Converter with Extended Counting and Hardware Reuse.pdf
| I2021_28.08V Multi-Modal Peripheral Nerve Active Probe and Microstimulator with On-Chip Dual-Coil PowerData Transmission and 64 2nd-Order Opamp-Less ΔΣ ADCs.pdf
| I2021_S28V Biomedical Systems.pdf
|
+---I2021_S31V Analog Techniques
| I2021_31.01V An 82mW ΔΣ-Based Filter-Less Class-D Headphone Amplifier with-93dB THD+N, 113dB SNR and 93% Efficiency.pdf
| I2021_31.02V A 0.9V 28MHz Dual-RC Frequency Reference with 5pJCycle and ±200ppm Inaccuracy from -40oC to 85oC.pdf
| I2021_31.03V A 0.14mm2 16MHz CMOS RC Frequency Reference with a 1-Point Trimmed Inaccuracy of ±400ppm from ?45°C to 85°C.pdf
| I2021_31.04V A Chopper-Stabilized Amplifier with -107dB IMD and 28dB Suppression of Chopper-Induced IMD.pdf
| I2021_S31V-Analog Techniques.pdf
|
+---I2021_S32V-FREQUENCY SYNTHESIZERS
| I2021_32.01V A 365fsRMS-Jitter and ?63dBc-Fractional Spur, 5.3GHz-Ring-DCO-Based Fractional-N DPLL Using a DTC’s SecondThird-Order Nonlinearity Cancellation and a Probability-Density-Shaping ΔΣM.pdf
| I2021_32.02V A 14nm Analog Sampling Fractional-N PLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter and 93fs at Near-Integer Channels.pdf
| I2021_32.03V A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter.pdf
| I2021_32.04V A 104fsRMS-Jitter and ?61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation Technique.pdf
| I2021_32.05V A 24GHz Self-Calibrated ADPLL Based FMCW Synthesizer with 0.01% rms Frequency Error under 3.2GHz Chirp Bandwidth and 320 MHzμs Slope.pdf
| I2021_32.06V A K-Band 12.1 to 16.6GHz Subsampling ADPLL with 47.3fsrms Jitter Based on a Stochastic Flash TDC and Coupled Dual-Core DCO in 16nm FinFET CMOS.pdf
| I2021_32.07V A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.pdf
| I2021_32.08V A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays.pdf
| I2021_S32V-FREQUENCY SYNTHESIZERS.pdf
|
+---I2021_S33V High-Voltage, GaN and Wireless Power
| I2021_33.01V A Fully Integrated GaN-on-Silicon Gate Driver and GaN Switch with Temperature-compensated Fast Turn-on Technique for Improving Reliability.pdf
| I2021_33.02V A 600V GaN Active Gate Driver with Dynamic Feedback Delay Compensation Technique Achieving 22.5% Turn-on Energy Saving.pdf
| I2021_33.03V An Automotive-Use 2MHz, 100VOUT, Flicker-Free Frequency Modulated GaN-Based Buck-Boost LED Driver Achieving Bootstrap Charge Balancing and 16.8dBμV Radiated EMI Noise.pdf
| I2021_33.04V An 8A 998Ainch3 90.2% Peak Efficiency 48V-to-1V DC-DC Converter Adopting On-Chip Switch and GaN Hybrid Power Conversion.pdf
| I2021_33.05V A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mWmm2 Power Density.pdf
| I2021_33.06V A Wireless Power Transfer System with Up-to-20% Light-Load Efficiency Enhancement and Instant Dynamic Response by Fully Integrated Hysteretic Control for Bioimplants.pdf
| I2021_33.07V A Frequency-Splitting-Based Wireless Power and Data Transfer IC for Neural Prostheses with Simultaneous 115mW Power and 2.5Mbs Forward Data Delivery.pdf
| I2021_33.08V A Decentralized Daisy-Chain-Controlled Switched-Capacitor Driver for Microrobotic Actuators with 10x Power-Reduction Factor and Over 300V Drive Voltage.pdf
| I2021_33.09V A Hybrid Switching Supply Modulator Achieving 130MHz Envelope Tracking Bandwidth and 10W Output Power for 2G3GLTENR RF Power Amplifiers.pdf
| I2021_S33V High-Voltage, GaN and Wireless Power.pdf
|
+---I2021_S34V Emerging Imaging Solutions
| I2021_34.01V An 8960-Element Ultrasound-on-Chip for Point-of-Care Ultrasound.pdf
| I2021_34.02V A 21pJframepixel Imager and 34pJframepixel Image Processor for a Low-Vision Augmented-Reality Smart Contact Lens.pdf
| I2021_34.03V A 32×32 Pixel 0.46-to-0.75THz Light-Field Camera SoC in 0.13μm CMOS.pdf
| I2021_34.04V An Energy-Replenishing Ultrasound Pulser with 0.25CV2f Dynamic Power Consumption.pdf
| I2021_S34V Emerging Imaging Solutions.pdf
|
+---I2021_S35V Adaptive Digital Techniques for Variation Tolerant Systems
| I2021_35.01V An Octa-Core 2.82GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC.pdf
| I2021_35.02V A 0.021mm2 PVT-aware Digital-Flow Compatible Adaptive Back Biasing Regulator with Scalable Drivers achieving 450% Frequency Boosting and 30% Powe.pdf
| I2021_35.03V Thread-Level Power Management for a Current- and Temperature-Limiting System in a 7nm Hexagon? Processor.pdf
| I2021_S35V Adaptive Digital Techniques for Variation Tolerant Systems.pdf
|
\---I2021_S36V Hardware Security
I2021_36.01V Unified In-Memory Dynamic TRNG and Multi-Bit Static PUF Entropy Generation for Ubiquitous Hardware Security.pdf
I2021_36.02V An EMPower SCA Resilient AES-256 with Synthesizable Signature Attenuation using Digital-Friendly Current Source and RO-Bleed based Integrated Local Feedback and Global Switched Mode Cont.pdf
I2021_36.03V A Modeling Attack Resilient Strong PUF with Feedback-SPN Structure Having 0.73% Bit Error Rate Through In-Cell Hot-Carrier Injection Burn-in.pdf
I2021_36.04V A Physically Unclonable Function Combining a Process Mismatch Amplifier in an Oscillator Collapse Topology.pdf
I2021_36.05V An Automatic Self-Checking and Healing Physically Unclonable Function (PUF) with 3E-8 Bit Error Rate.pdf
I2021_S36V Hardware Security.pdf
|
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