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[招聘] 北京AI研发公司验证职位招聘可放上海

发表于 2018-8-10 16:49:30 | 显示全部楼层 |阅读模式




1. Develop test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's

2. Create verification environment for both directed and random verification

3. Create reusable bus functional models, monitors, checkers and scoreboards

4. Drive functional coverage driven verification closure

5. Work with architects, designers and post-silicon teams


1. MS with 5+ or 3+ years of experience in design verification

2. Experience with RISC CPU (RISCV/MIPS/ARM) related IPs verification are highly desirable

3. Experience with USB/MIPI_CSI/MIPI_DSI or other high speed interface IPs verification are highly desirable

4. Experience with Deep Learning Accelerator related IPs verification are highly desirable

5. Excellent knowledge of popular EDA simulation tools (VCS or equivalent simulation tools, debug tools like Debussy, Simvision)

6. Experience in System Verilog or similar HVL is highly desirable

7. C++ programming language experience desirable

8. Scripting knowledge (Perl/shell)

9. Excellent communication skills and ability to lead highly competent team.

发表于 2018-8-10 19:31:14 | 显示全部楼层
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