cadence AMS仿真问题求助

yuan_sheng

用irun的脚本方式运行，跑仿真出现以下错误！
Discipline resolution Pass...
.vop( net9 ), .vss( cds_globals.\gnd!  ), .ck2( net028 ), .ck1( net11 ),
                                                     |
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|53): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.
.vop( net9 ), .vss( cds_globals.\gnd!  ), .ck2( net028 ), .ck1( net11 ),
                                                                    |
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|68): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.
net022[0:15] ), .filter_in( { cds_globals.\gnd! ,net9 } ), .reset(
                                               |
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,27|47): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I1.
net17 ), .clk( net017 ) );
    |
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,28|4): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I1.
net17 ), .clk( net017 ) );
请知道解决办法的高手赐教！

09微电子小贝

没有加connect rules

duguyimeng

adding the connect rules "ConnRules_18V_fll_fast".

xu452593719

请问楼主这个问题解决了吗？

dutu

2# 正确

mofeng81

问题解决了吗