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[招聘] ASIC工程师招聘-cisco

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发表于 2013-5-20 09:50:56 | 显示全部楼层 |阅读模式

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有意者请发邮件到我的邮箱chengwa@cisco.com
标题请写 简历+姓名+工作年限
Cisco Introduction

Cisco Systems is a world-wide leader in networking and communication technology and a Fortune 500 company with revenue of 40 billion USD in 2010.

Cisco EBBU Introduction

Enterprise Backbone Business Unit develops industry leading Catalyst 6500 modular switches and next generation scalable network platform. EBBU team in Cisco China Research and Development Center (Shanghai, China), concentrates on next-generation system engineering developments.

Position: asic/FPGA Engineer

Job Descriptions:

Participate in the design and verification of complex, and leading edge ASICs used in high performance networking equipments. In particular, you will be involved in developing hardware for Cisco award-winning switching platforms.

Responsibilities:

Implementation of complex ASICs and/or FPGAs.
Take part in the architecture definition, implementation and verification phases.
Detailed design specification and test plan development.
Develop and implement block level RTL, perform synthesis and achieve timing closure.
Standalone module, full chip and system level verification, formal verification and equivalence checking.
Work with cross-functional teams (hardware, software, diagnostics, signal integrity group).
Assist in complex subsystem level bring-up, integration, and unit test verification.

Skills Required:

Experience in high performance ASIC/FPGA design from start to finish.
Good understanding of ASIC/FPGA methodologies and tool flows.
Working knowledge using hdl languages and tools, scripting and programming languages (Perl, TCL, C and C++).
Experience with Systemverilog, VMM/OVM/UVM is a strong plus. English written and verbal communications, team and people skills.
Self motivated, ability to work independently with minimal supervision and provide a leadership role.
Knowledge of Data Networking fundamentals, switches and routers desirable.

Educational Background:

Typically requires MSEE/CS combined with 1-7+ years of related experience, or BSEE/CS combined with 2-10+ yrs related experience.
发表于 2013-5-20 11:47:47 | 显示全部楼层
亲,没有工作地点。
发表于 2013-5-20 13:33:01 | 显示全部楼层
呵呵,同上,没有工作地点呢
发表于 2013-5-20 13:38:12 | 显示全部楼层
人家在介绍里都写了是上海了。看看清。
发表于 2013-5-20 16:03:55 | 显示全部楼层
上海的啊!!!not fit me !!!
发表于 2013-5-20 21:03:22 | 显示全部楼层
问下,需要中英文简历吗?xiexie
 楼主| 发表于 2013-5-21 09:53:15 | 显示全部楼层
中英文简历都要的,谢谢
 楼主| 发表于 2013-5-21 21:19:16 | 显示全部楼层
本帖最后由 asic_wang 于 2013-5-22 13:29 编辑

向有意向的朋友提醒一下,有个要求相对比较重要,就是对SystemVerilog的熟练掌握和OVM/UVM的使用经验(最好是UVM),谢谢关注!
这几天收到有些朋友把多次发送简历,这个邮箱是我的私人工作邮箱,请大家不要重复投递,尽情谅解,谢谢!
 楼主| 发表于 2013-5-22 15:00:26 | 显示全部楼层
不再接收新的简历投递,谢谢大家的关注!
 楼主| 发表于 2013-5-22 15:01:14 | 显示全部楼层
不再接收新的简历,谢谢大家的关注!
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