DC综合后的面积报告，可以用来确定ICC的floorplan？[已解决]

TacuLee · 发表于 2015-8-7 16:59:55

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本帖最后由 TacuLee 于 2015-8-11 03:03 编辑

Combinational area:    2757.008115
Buf/Inv area:             149.440901
Noncombinational area: 10453.802662
Net Interconnect area:    undefined  (No wire load specified)

Total cell area:       13210.810777
Total area:                undefined

Core Area:                   22211
Aspect Ratio:                1.0028
Utilization Ratio:          0.5948

The above information was reported from the logical library. The following are from the physical library:

  Total moveable cell area: 13210.8
  Total fixed cell area: 0.0
  Total physical cell area: 13210.8
  Core area: (0 0 148830 149240)

这里面的total area可以认为是std cell的总面积，那么其中的core area是什么？可以用来作为下一步ICC的floorplan的参考尺寸用？