开源软核学习笔记02（找到OC8051的帮助资料）——2014_1_8

oldbeginner

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Multipleksers （多路复用器）

总线管理是基于多路复用器的，他们的主要特点是选择输入信号并转换成相应的输出信号。输入信号来自oc8051_decoder （译码）模块的八位宽的信号。

1、oc8051_alu_src1_sel

This module is used to choose first ALU operand. There are immediate operand, accumulator, data from intrernal memory or data from external memory available.

这个模块用来选择第一个ALU操作数。他们来自立即操作数，ACC，有效的内部空间数据或外部空间数据。 //根据src3更改

2、oc8051_alu_src2_sel

This module is used to choose second ALU operand. There are immediate operand, accumulator, data from both memories (internal, external) or zero available.

这个模块用来选择第二个ALU操作数。他们来自立即操作数，ACC，有效的内部空间数据或外部空间数据或者零。

3、oc8051_alu_src3_sel

This module is used to choose third ALU operand: from program counter or from DPTR.

这个模块用来选择第三个ALU操作数。他们来自程序计数器或者DPTR。

4、oc8051_cy_select

With this module we choose which carry will be sent to ALU: from PSW, bit data from memory, zero or one.

选择把以下哪里的进位送给ALU，
1、来自PSW
2、来自空间的位数据；
3、0
4、1

5、oc8051_ext_addr_sel

Used for choosing address for external memory: R0 or R1 (same as indirect addressing) or DPTR.

选择外部空间地址：R0或R1 （等同于间接寻址） 或者 DPTR。

6、oc8051_immediate_sel

Selection of immediate operand. There are two outputs, for first and second ALU operand. We can choose between PC, second or third instruction byte.

选择立即操作数。有两个输出，一个用作第一个ALU操作数，另一个用作第二个ALU操作数。可以在PC （程序计数器），第二个或第三个指令字节之中选择。

7、oc8051_ram_rd_sel

Selection of read address: register (R0-R7), indirect address, stack or direct address. When we address registers there are only five bits used (upper three are always zero).

选择读地址：
1、寄存器（R0-R7）；
2、间接地址；
3、堆栈；
4、直接地址。

当选择地址寄存器时，只有五个位的数值被使用（前三个位的数值总是零）。

8、oc8051_ram_wr_sel

Selection of write address: register (R0-R7), indirect address, stack, direct address, accumulator, DPTR or B register.

选择写地址：
1、寄存器（R0-R7）；
2、间接地址；
3、堆栈；
4、直接地址；
5、DPTR；
6、B寄存器。

9、oc8051_rom_addr_sel

Selection of Program Memory address: PC or DPTR (only at MOVC instruction).

选择程序空间地址：
1、PC；
2、DPRT （只在MOVC指令下有效）。

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这类用来选择的模块有9个，功能也好理解。

接下来介绍指令执行过程。

oldbeginner

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Instruction execution
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为了有个整体认识，我们需要看三个时钟周期。

First clock cycle:
Instruction is not fetched yet. Based on previous value of PC and operation code new PC value is computed. This gives as the address of the next instruction. In the next step new op code and operands are fetched from Program Memory.

第一个时钟周期，指令还没被提取。基于前一个PC值和操作码，新的PC值被计算出，作为下一条指令的地址。
下一步就可以从程序空间中提取新的操作码和操作数。

Second clock cycle:
This is first execution cycle. In this period operation code is forwarded to oc8051_pc module, where new PC is computed and to oc8051_decoder module, where all control signals are set. All signals, except internal Data Memory read address signal are delayed for one clock cycle (with oc8051_regX modules). With this delay we achieve that at next active front operand is read from internal Data Memory, control signals and other possible immediate operands are saved to registers.

第二个时钟周期同时是第一个执行周期。在该周期，操作码送到 oc8051_pc 模块，这时新的 PC 值被算出并送到 oc8051_decoder 模块，并且所有的控制信号被置位。
不包括内部数据读地址信号，所有信号都被延迟一个时钟周期 （借助 oc8051_regX 模块）。利用这一延迟，当下一个操作数被从内部数据空间读出后，控制信号和其它可能的立即操作数被保存在寄存器中。

Third clock cycle: This is second, last execution cycle. I this cycle signals reach their destination. With oc8051_alu_src1 and oc8051_alu_src2 ALU operand are chosen. Operation in ALU is executed and result(s) is written to selected address in memory.

第三个时钟周期同时是第二执行周期。在这一周期，信号到达目的地。
利用oc8051_alu_src1 和 oc8051_alu_src2 ， 选择ALU 操作数。在 ALU 中进行运算，然后结果被写入到选择好的空间地址中。



图片同样做的不好，目前只是放大一下字体和加粗线条。过程并没有显示出来。

对图片做些修改，只显示模块，去掉信号。这样可以看清模块关系。



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下面又分5部分介绍指令类：

1、算术逻辑类指令；

2、数据传输类指令；

3、位操作类指令；

4、程序跳转类指令；

5、寻址模式。

oldbeginner

下面的内容在单片机课件中都可以找到，资料比较丰富。

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1、Arithmetic and logic instructions  算术和逻辑指令

Main characteristic of these instructions is that we have to define both ALU operands and ALE operation. Exceptions among these instructions are MUL (multiply) instruction Div (divide) instruction. Difference between these two and the other instructions is in result. When MUL or Div are executed we get 16 bit result and half of it is saved to B register (result1), second half (result2) is saved to ACC. This is achieved if the result is normally written to B register, then wad2 signal is set and with this second result is written to ACC.

这些指令的特点是我们必须定义 ALU 操作数和 ALE （地址锁存允许）运算，除了两个例外：乘法和除法。这两个指令的不同之处在于结果：当执行乘法或除法时，我们得到十六位宽的结果，其中八位存在 B 寄存器（结果1），另一半（结果2）存在ACC 中。
结果通常写入 B 寄存器，然后wad2 信号置位， 接着第二个结果就写入了 ACC 中。

Another exception is also INC DPTR instruction, which addresses 16 bit DPTR register. Desired effect is achieved with ALE source3, where upper 8 bits are forwarded, zeros are forwarded to source2, input carry is set to 1, and then add operation is executed.

另一个例外是INC DPRT 指令，它记录十六位宽 DPTR 寄存器的地址。前八位宽位的值被发送给ALE 的 source3，然后0被发送给source2，然后输入进位被置1，然后运算执行。

Next instructions are included in this group:
-        ADD        add
-        ADDC        add with carry
-        SUBB        subtract with carry
-        INC        increase by 1
-        DEC        decrease by 1
-        MUL        multiply
-        DIV        divide
-        DA        decimal adjust
-        ANL        logical and
-        ORL        logical or
-        XRL        logical xor
-        CLR        clear
-        RL        rotation left
-        RLC        rotation left with carry
-        RR        rotation right
-        RRC        rotation right with carry
-        SWAP        swap bits

以上是可以执行的指令。

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2、Data transfer instructions  数据传送指令

This group contains instructions that do not change data value, they just transfer the data to another memory location. ALU operation is fixed to oc8051_alu_nop, which only transfers data from input to output from where it is written to desired location. Exceptions are switdh instructions (XCH and XCHD) where ALE operation oc8051_alu_xch is used.

本组的指令不会修改数值，只是更改数据的存储空间。ALU运算相对应oc8051_alu_op 是固定的，其中oc8051_alu_op 只是将输入的数据传送给要写入地址的输出。例外的是swidth 指令（XCH 和 XCHD），这时 ALE 运算——oc8051_alu_xch 被执行。

This instruction group also contains instructions for external memory handling. Picture belows shows a detail from kernel that manages external Data Memory. Read address is chosed with oc8051_ext_addr_sel multiplekser, input data is available in the next clock cycle. Data is available like an option on the multiplekser with which we choose ALE source 1. With the normal procedure data is then written to the internal memory. When writting we only need address and write_x signal and there should be signal from ACC on the output pins.

这组指令也包括外部空间操作指令。下图显示了内核是如何控制外部数据空间的。
读地址利用oc8051_ext_addr_sel 选择，输入数据在下一个时钟周期有效。
选择ALE source1 ，数据有效。数据被写入内部空间。当写入时，只需要地址和write_x 信号，同时一定有来自ACC的信号。



Special instruction for data transfer is also instruction for data transfer from Program Memory. With this instruction we use another multiplekser (oc8051_rom_addr_sel) for address chosing, this multiplekser does not send PC value to output this time but instead it sends ALU operation result. Data is recieved in the next clock cycle as an immediate operand. This instruction takes two clock cycles.


特殊指令也用来从程序空间传送数据。这次使用另一个选择器（oc8051_rom_addr_sel）来选择地址，该选择器不会发送PC 的值，而是 发送 ALU 运算结果给输出。下一时钟周期收到的数据作为立即操作数。这个指令花费两个时钟周期。








Data transfer instructions are:
-        MOV
-        PUSH
-        POP
-        XCH
-        XCHD

以上是相关指令。

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oldbeginner

3、Bit addressable instructions

These instructions do their operations on bits. They operate same as arithmetic-logical instructions, difference is that instead of ALU source they have bit input and ALU carry, result is available on ALU output.
When bit instructions are used we have to take special care when chosing ALU operation. Carry input in ALU is chosen with oc8051_cy_select multiplekser, we can choose between PSW (PSW.7), bit output from memory, logical 1 or logical 0. First two options are used in operations, second two are used for setting (or reseting) particular bits.

位操作指令和逻辑运算指令类似，区别在于他们用位输入和ALU进位代替了ALU 输入，结果可以通过ALU 输出。
使用位指令时，需要特别留意选择ALU运算。利用oc8051_cy_select选择ALU的进位输入，我们有四个选项：PSW （PSW.7），空间的位输出，逻辑1或逻辑0。
前两个选项用在运算中，后两个用来给特定位的置位（或复位）。



This group also contains jump instructions (JC, JNC, JB, JNB and JBC) Which will be decribed more thoroughly in next section.
Other instructions in this group are:
-        ANL
-        ORL
-        MOV
-        CLR
-        SETB
-        CPL

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4、Program jumps

Program jumps are not very similar to other instructions in their execution. The fact that they change PC value is enough that we have to stop the pipeline and wait to get first instruction from new address.

转移指令和其它指令不太类似。这些指令改变PC 值，以致不得把停止流水线，等待从新地址取得第一条指令。

Considering the time we spend on each instruction program jumps can be diveded to three groups:

利用花费时间的不同，将这类指令分成三组：

First group contains instructions that need two clock cycles. These instructions have the value for new PC represented as immediate operand (ACALL, AJMP, LCALL in LJMP). With these instructions new value is written to PC and we simply wait for new instruction.

第一组指令需要两个时钟周期。这组指令让新的PC 值作为立即操作数。利用这组指令，新的数值被写入 PC，然后等待新的指令。

Second group of instructions needs three clock cycles to execute. These jumps get new address (new PC value) as a sum from current PC (or DPTR in case of JMP ) and immediate operand which is represented as tows-complement.

第二组指令需要三个时钟周期。后面的不翻译了，直接引用课件：该组指令是变址寻址（间接）转移指令，它是将累加器A中的8位数和数据指针DPTR中的16位数相加，形成16位的转移目标地址送给PC，而不改变A和DPTR的内容，不影响标志位。

Third and last group contains instructions that need four clock cycles to finish their job.

最后一组指令需要四个时钟周期。

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5、Addressing modes

There are two modules that control addressin modes, oc8051_ram_rd_sel and oc8051_ram_wr_sel.

控制寻址模式的有两个模块：oc8051_ram_rd_sel 和 oc8051_ram_wr_sel。

Those two modules are multipleksers with which we choose from which address we will read and to which we will write. Operands that do not need a read from memory (immediate operands) are selected with oc8051_immediate_sel multiplekser.

利用这两个模块，我们可以选择要读取的地址或要写入的地址。操作数利用oc8051_immediate_sel 选择。

The last word at selecting the data source has another pair of multipleksers oc8051_alu_src1_sel and oc8051_alu_src1_sel. With them we can choose between data from the Data Memory, from the ACC or immediate operand.

利用 oc8051_alu_src1_sel 和 oc8051_alu_src2_sel ，可以选择是从数据空间或是ACC或是理解操作数中，读取数据。



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这样，指令执行介绍就看完了，感觉很空，因为没有完整的利用verilog的互动动画，也没有完成一个完整的指令执行过程。
不过，在后面的细节学习时，感觉这块内容应该可以得到具体理解。

另外，这部分内容学习应该以单片机课件来帮助学习，因为单片机在这方面的资料比较多。

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中断的内容比较少，直接加在后面
Interrupts

As we had already seen module oc8051_int manages interrupt handling. This module intercepts interrupt, defines address of interrupt program and sends interrupt demand to next module. If interrupt is enabled and none with higher (or same) priority is already processing then modul sets int signal and writes interrupt program address to int_v bus.

This interrupt demand is send to oc8051_op_select module which stops execution of current program and starts executing LCALL instruction. When interrupt program finishes (with RETI instruction) oc8051_decoder sets reti signal and communicate oc8051_int module that processing of interrupt is finished so program can be interrupted on this priority level.

frankshieh

http://www.oreganosystems.at/?page_id=96
Oregano 的8051 IP應該比較完整, 以前我搞了一個embdeded ICE, 並且實際驗證過 Oregano 的8051 IP, 基本上沒遇到啥bug!

oldbeginner

回复 15# frankshieh

因为我是打算利用OC8051 入门的，不过在学习中，改成了OpenMIPS用来入门，理解OpenMIPS后，目前还没有计划再回头理解 8051软核。

ralphtwtw

开源软核学习笔记02（找到OC8051的帮助资料）——2014_1_8