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楼主: whitetiger

[招聘] Synopsys内推(武汉)大量职位

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 楼主| 发表于 2014-2-18 20:34:43 | 显示全部楼层
回复 10# whitetiger


   This position is responsible for designing innovative analog, RF and mixed-signal integrated circuits following circuit specifications from published protocols and standards; and, selecting/creating circuit architectures based on practical experience and knowledge of current circuit literature under  review and necessary supervision from seniority.  Furthermore you will apply theoretical knowledge to analyze and explain circuit behavior and limitations; implement rigorous simulation test-benches to verify circuit performance; incorporate test and tuning controls;  clearly document all circuit details; and guide, implement and review IC layouts.
Generally, this position requires a MSc or above in Electrical or Computer Engineering.  The successful candidate must possess a solid understanding of specialization area plus knowledge of one other related area;  have the ability to resolve issues in creative ways; exercise judgment in selecting methods and techniques to obtain solutions; execute projects from start to completion; contribute to moderately complex aspects of a project; and, determines and develops recommendations to solutions. The position of Analog Design Engineer, while working on team-driven or task-oriented projects,  follow well instructions on day-to-day work and new assignments and projects; work is evaluated upon completion to ensure objectives have been met. This position will work in a collaborative manner with peers with aspects of their job and network with senior internal and external personnel in own area of expertise.
 楼主| 发表于 2014-2-18 20:36:55 | 显示全部楼层
回复 11# whitetiger


   Responsible for designing, developing, troubleshooting, or debugging software programs. Develops software tools including operating systems, compilers, routers, networks, utilities, databases and internet-related tools, etc. Determines hardware compatibility and/or influences hardware design.

Experience in programming software for operating systems, utilizing machine assembly and/or job control languages, and some knowledge of software capabilities. Designs algorithms and data structures. Experience on development of complex software projects, familiarity with C/C++ coding, and a strong background in data structures and algorithms. Has strong desires to learn and explore new technologies and demonstrates good analysis and problem-solving skills. Prior knowledge and experience of CAD tool development are required.

Typically requires a minimum of 2 years of related experience. Developing professional expertise, applies company policies and procedures to resolve a variety of issues. Has working knowledge of work area and general proficiency with tools, systems, and procedures required to accomplish the job. Exercises judgment within defined procedures and practices to determine appropriate action. Receives general instructions on routine work, detailed instructions on new assignments. Implementations and solutions are reviewed for accuracy and overall adequacy. Builds productive internal/external working relationships. Contacts are primarily within business unit and occasional organizational and external customer contacts on routine matters.
 楼主| 发表于 2014-2-18 20:37:46 | 显示全部楼层
回复 12# whitetiger


   In the position of a Sr II Analog Design Engineer you will be a part of a team developing high speed analog integrated circuits. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You must have experience in designing at least two of the following key functions: Clock and Data Recovery, PLLs, Transmitters, Receivers, Bandgaps.  You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.  Experience with tools for schematic entry, IC layout and SPICE simulation is required.  Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.  Experience with TCL, perl, C, python, MATLAB, or other scripting languages is desired.


This position is responsible for designing innovative analog, RF and mixed-signal integrated circuits; developing circuit specifications working from published protocols and standards; and, selecting/creating circuit architectures based on practical experience and knowledge of current circuit literature.  Furthermore you will apply theoretical knowledge to analyze and explain circuit behavior and limitations; implement rigorous simulation test-benches to verify circuit performance; incorporate test and tuning controls; participate in critical peer reviews;  clearly document all circuit details; and guide, implement and review IC layouts.

Generally, this postion requires a BSc in Electrical or Computer Engineering with 5+ years of experience, or MSc with 3+ years of experience, or PhD with 1+ years of experience.  The successful candidate must possess a solid understanding of specialization area plus working knowledge of one other related area;  have the ability to resolve issues in creative ways; exercise judgment in selecting methods and techniques to obtain solutions; execute projects from start to completion; contribute to moderately complex aspects of a project; and, determines and develops recommendations to solutions. The position of Sr II Analog Design Engineer, while working on team-driven or task-oriented projects,  receives little instructions on day-to-day work and general instructions on new assignments and projects; work is evaluated upon completion to ensure objectives have been met. This position may guide more junior peers with aspects of their job and network with senior internal and external personnel in own area of expertise.

 楼主| 发表于 2014-2-18 20:38:45 | 显示全部楼层
回复 13# whitetiger


  In the position of a Sr II Analog Design Engineer you will be a part of a team developing high speed analog integrated circuits. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You must have experience in designing at least two of the following key functions: Clock and Data Recovery, PLLs, Transmitters, Receivers, Bandgaps.  You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.  Experience with tools for schematic entry, IC layout and SPICE simulation is required.  Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.  Experience with TCL, perl, C, python, MATLAB, or other scripting languages is desired.

This position is responsible for designing innovative analog, RF and mixed-signal integrated circuits; developing circuit specifications working from published protocols and standards; and, selecting/creating circuit architectures based on practical experience and knowledge of current circuit literature.  Furthermore you will apply theoretical knowledge to analyze and explain circuit behavior and limitations; implement rigorous simulation test-benches to verify circuit performance; incorporate test and tuning controls; participate in critical peer reviews;  clearly document all circuit details; and guide, implement and review IC layouts.

Generally, this postion requires a BSc in Electrical or Computer Engineering with 5+ years of experience, or MSc with 3+ years of experience, or PhD with 1+ years of experience.  The successful candidate must possess a solid understanding of specialization area plus working knowledge of one other related area;  have the ability to resolve issues in creative ways; exercise judgment in selecting methods and techniques to obtain solutions; execute projects from start to completion; contribute to moderately complex aspects of a project; and, determines and develops recommendations to solutions. The position of Sr II Analog Design Engineer, while working on team-driven or task-oriented projects,  receives little instructions on day-to-day work and general instructions on new assignments and projects; work is evaluated upon completion to ensure objectives have been met. This position may guide more junior peers with aspects of their job and network with senior internal and external
 楼主| 发表于 2014-2-18 20:39:46 | 显示全部楼层
回复 14# whitetiger


   
The candidate will be to work closely with Synopsys customers, enabling them to design embedded systems based hardware through the efficient use of our CPU core offerings. The systems engineer will be required to prepare board-level demos, benchmark ARC technologies and prepare competitive analysis. The systems engineer will also be required to investigate and answer in-depth technical questions about Synopsys ARC processors as well as the RTL design / debug / verification.

Recent graduates and experienced engineers are welcome. Please submit your resume if you meet the "MUST" requirements and at least one "helpful" qualification.

Key responsibilities:
· Provide ARC core specific hardware development ARChitect tool chain support to Synopsys's customer base/field teams
· Strong problem solving ability for RTL and debug through verification capability.
· Provide technical content for Synopsys support site (Application Notes, Technical Articles, FAQs)
· Feedback to R&D and marketing on problematic product areas and required product enhancements
· Participation in product review and release process within technology domain of supported product

Requirements (MUST):
· RTL Coding (Verilog/System Verilog/System C).
· Embedded systems programming.
· Knowledge of at least one microprocessor/DSP architecture.
· Experience of hardware development using Verilog for ASIC or FPGA development including Usage of RTL coding (Verilog/System Verilog), logic simulation and synthesis, timing analysis, and verification methodologies.
· Strong problem solving ability and debug through verification capability.
· Excellent oral and written communication skills (English).
· Ability and desire to learn.

Helpful qualifications:
· Previous customer facing experience desirable.
· Domain knowledge of ISS (instruction Set Simulator) and FPGA emulation a strong plus.
· Comfortable with System C or System Verilog Platform development.
· Knowledge of TCL/TK scripting language.
· Knowledge of silicon level implications on area, low power, and speed performance.
· Knowledge using compilers, linkers, assemblers and debuggers and run subset test programs on
· CPU core in C/C++ and assembly code.
· Experience in creating customer oriented documentation through usage of commercial standards, such as FrameMaker or equivalent.
 楼主| 发表于 2014-2-18 20:41:17 | 显示全部楼层
回复 15# whitetiger


   Hardware Verification Engineer  
We are a team working on producing the highly optimized hardware IP compiler for the ARC family of 32-bit configurable processors.   We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers develop highly optimized and very sophisticated embedded designs.
Responsibilities · Creation and execution of   Hardware IP Verification Plans
· During the hardware verification phase, you will be expected to work closely with the development teams globally and to sign-off on the test plan and execute upon its contents
Requirements · Understanding of Hardware Verification Methodologies and best practices – Coverage Driven Verification, constrained random testing, VMM, eRM, OVM, UVM HDL
· Proficient in verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera
Ideally, knowledge of, and have verified, processors or processor based systems Knowledge of languages such as,   SystemC, C, Perl, makefile generation Knowledge of tools such as, RTL Simulators, e.g. VCS, IES, Questa Knowledge of Operating Systems such as, Linux, Windows XP/Vista Good analytical skills encompassing: Analysis of product testing requirements Ability to analysis test results and provision reports Excellent written and verbal skills including: Excellent written and spoken English Detailed status reporting Creation, modification and review of test documentation; plans, procedures, scenarios, data, test reports Ability to present verification results to the program management teams BSc or Electrical Engineering as a minimum, or equivalent experience Required Personality Skills Team player keen to work in a global development environment Self motivated Helpful qualifications Experience of working within a global development team
 楼主| 发表于 2014-2-18 20:42:18 | 显示全部楼层
回复 16# whitetiger


   
This position of “R&D Engineer, II” is an ASIC/Digital Design & Verification Engineer whose mandate is to participate in the design of semiconductor integrated circuits in compliance with the project’s specifications and Synopsys’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, RTL coding, behavioural coding, testbench and testcase generation, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation.  

The duties performed by the R&D Engineer I, will include, though not be limited to:

·
Understand design specifications.

·
Write synthesizable RTL code for circuit portions of integrated circuits.

·
Write behavioural models.

·
Generate testbenches and testcases.

·
Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.

·
Generate timing constraints for synthesizable designs.

·
May perform logic synthesis and/or static timing analysis.

·
Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.

·
May perform mixed-mode simulations.

·
Documentation of functionality, code, verification environments/plans, and design procedures.

·
May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.

·
Communicate with other Synopsys employees regarding customer technical support.

·
May communicate directly with customers regarding technical support.

·
Other related duties as assigned by the manager.

The position of R&D Engineer II requires a degree in Engineering or Applied Science (or equivalent) and 2+ years working experience in a related field as well as familiarity with both verilog circuit design and design verification and with generation of timing constraints for ASIC designs.

 楼主| 发表于 2014-2-18 20:43:05 | 显示全部楼层
回复 17# whitetiger


   
This position of “R&D Engineer, II” is an ASIC/Digital Design & Verification Engineer whose mandate is to participate in the design of semiconductor integrated circuits in compliance with the project’s specifications and Synopsys’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, RTL coding, behavioural coding, testbench and testcase generation, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation.  

The duties performed by the R&D Engineer I, will include, though not be limited to:

·
Understand design specifications.

·
Write synthesizable RTL code for circuit portions of integrated circuits.

·
Write behavioural models.

·
Generate testbenches and testcases.

·
Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.

·
Generate timing constraints for synthesizable designs.

·
May perform logic synthesis and/or static timing analysis.

·
Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.

·
May perform mixed-mode simulations.

·
Documentation of functionality, code, verification environments/plans, and design procedures.

·
May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.

·
Communicate with other Synopsys employees regarding customer technical support.

·
May communicate directly with customers regarding technical support.

·
Other related duties as assigned by the manager.

The position of R&D Engineer II requires a degree in Engineering or Applied Science (or equivalent) and 2+ years working experience in a related field as well as familiarity with both verilog circuit design and design verification and with generation of timing constraints for ASIC designs.

 楼主| 发表于 2014-2-18 20:43:49 | 显示全部楼层
回复 18# whitetiger


   

This position of “R&D Engineer, II” is an ASIC/Digital Design & Verification Engineer whose mandate is to participate in the design of semiconductor integrated circuits in compliance with the project’s specifications and Synopsys’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, RTL coding, behavioural coding, testbench and testcase generation, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation.  

The duties performed by the R&D Engineer I, will include, though not be limited to:

·
Understand design specifications.

·
Write synthesizable RTL code for circuit portions of integrated circuits.

·
Write behavioural models.

·
Generate testbenches and testcases.

·
Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.

·
Generate timing constraints for synthesizable designs.

·
May perform logic synthesis and/or static timing analysis.

·
Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.

·
May perform mixed-mode simulations.

·
Documentation of functionality, code, verification environments/plans, and design procedures.

·
May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.

·
Communicate with other Synopsys employees regarding customer technical support.

·
May communicate directly with customers regarding technical support.

·
Other related duties as assigned by the manager.

The position of R&D Engineer II requires a degree in Engineering or Applied Science (or equivalent) and 2+ years working experience in a related field as well as familiarity with both verilog circuit design and design verification and with generation of timing constraints for ASIC designs.

 楼主| 发表于 2014-2-18 20:44:33 | 显示全部楼层
回复 19# whitetiger


   Job Description:

We are a team working on producing the highly optimized hardware IP for the ARC family of 32-bit configurable processors.  We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers to develop highly optimized and very sophisticated embedded designs.
To develop and maintain our micro-processor hardware IP including, specification, implementation and test To optimize designs for performance, speed, size and power and to improve verification test suites Creation and execution of  Hardware IP Verification Plans Development of processor testbenches using latest verification technology To develop new tests to improve functional/code coverage Interact with tools, modeling and simulation teams globally to deliver optimized solutions for our customers Perform various benchmarking and engineering testing tasks to improve overall product quality Job Requirement for Fresh Grads:
Strong desire to work with embedded processors or processor based systems · Knowledge of HDL design and ideally, RISC architectures
· Understanding of programming at assembly and C/C++ level
· Understanding of Hardware Verification Methodologies and best practices – Coverage Driven Verification, constrained random testing, VMM, eRM, OVM, UVM
· Understanding of design/verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera
· Knowledge of Perl or other scripting languages for flow automation
Knowledge of tools such as, RTL Simulators, e.g. VCS, IES, Questa Knowledge of Operating Systems such as, Linux, Windows XP/Vista Good analytical skills Analysis of product testing requirements Ability to analysis test results and provision reports Excellent written and verbal skills including: Written and spoken English Detailed status reporting Ability to present results to the program management teams A Bachelor’s degree in engineering is a minimum requirement Team player with excellent communications skills motivated to work in a global development environment Self-motivated
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