Synopsys内推（武汉）大量职位

whitetiger

回复 20# whitetiger


   

This position of “R&D Engineer, II” is an ASIC/Digital Design & Verification Engineer whose mandate is to participate in the design of semiconductor integrated circuits in compliance with the project’s specifications and Synopsys’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, RTL coding, behavioural coding, testbench and testcase generation, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation.  

The duties performed by the R&D Engineer I, will include, though not be limited to:

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Understand design specifications.

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Write synthesizable RTL code for circuit portions of integrated circuits.

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Write behavioural models.

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Generate testbenches and testcases.

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Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.

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Generate timing constraints for synthesizable designs.

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May perform logic synthesis and/or static timing analysis.

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Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.

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May perform mixed-mode simulations.

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Documentation of functionality, code, verification environments/plans, and design procedures.

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May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.

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Communicate with other Synopsys employees regarding customer technical support.

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May communicate directly with customers regarding technical support.

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Other related duties as assigned by the manager.

The position of R&D Engineer II requires a degree in Engineering or Applied Science (or equivalent) and 2+ years working experience in a related field as well as familiarity with both verilog circuit design and design verification and with generation of timing constraints for ASIC designs.

whitetiger

回复 21# whitetiger


   As part of the Solutions Group at our Wuhan Design Center, China, the selected candidate would be working on one or more aspects of the development of DesignWare family of synthesizable cores, including Specification, Architecting, Design, Verification and Release engineering for Synopsys IP products. The domains would span across areas such as AMBA (AHB, AXI), USB3, Gigabit Ethernet, Multimedia Cards, and MIPI.

The candidate would be assigned to work on either the design or verification tasks based on aptitude and business needs; the candidate will be part of a global team of expert Design/Verification Engineers.
o On the design side, the candidate would work on System level and RTL based hardware design using HDLs such as Verilog, and System Verilog; will use Lint tools for rule checking, Synthesis tools, and timing analysis; the designs may involve use of low power design techniques and implemented using Unified Power Flow.
o On the verification side, candidate would work on latest verification methodologies such as UVM, VMM. The verification tasks would include building or enhancement of CRV based complex test environment, test case writing in OOPS based languages such as SystemVerilog, running tests and debugging failures; will include Functional coverage implementation and would involve usage of industry standard simulators such as VCS.
Job Requirement for Fresh Grads:
• BSEE/MSEE in Electrical/ Electronic Engineering or allied subjects with minimum qualification marks of 70 % or CGPA of 7.0 and above, in aggregate of all semesters.
• It is essential that the individual has –
• aptitude to work in the VLSI domain,
• strong Digital Design skills,
• good communication skills,
• good analysis, debug and problem solving skills,

The position offers lot of learning opportunities for the candidate by working with the #1 Interface and wide portfolio of IP Provider in the Industry.

whitetiger

回复 22# whitetiger


   As part of the Solutions Group at our Wuhan Design Center, China, the selected candidate would be working on one or more aspects of the development of DesignWare family of synthesizable cores, including Specification, Architecting, Design, Verification and Release engineering for Synopsys IP products. The domains would span across areas such as AMBA (AHB, AXI), USB3, Gigabit Ethernet, Multimedia Cards, and MIPI.

The candidate would be assigned to work on either the design or verification tasks based on aptitude and business needs; the candidate will be part of a global team of expert Design/Verification Engineers.
o    On the design side, the candidate would work on System level and RTL based hardware design using HDLs such as Verilog, and System Verilog; will use Lint tools for rule checking, Synthesis tools, and timing analysis; the designs may involve use of low power design techniques and implemented using Unified Power Flow.
o    On the verification side, candidate would work on latest verification methodologies such as UVM, VMM. The verification tasks would include building or enhancement of CRV based complex test environment, test case writing in OOPS based languages such as SystemVerilog, running tests and debugging failures; will include Functional coverage implementation and would involve  usage of industry standard simulators such as VCS.
Job Requirement for Fresh Grads:
· BSEE/MSEE in Electrical/ Electronic Engineering or allied subjects with minimum qualification marks of 70 % or CGPA of 7.0 and above, in aggregate of all semesters.
· It is essential that the individual has –
· aptitude to work in the VLSI domain,
· strong Digital Design skills,
· good communication skills,
· good analysis, debug and problem solving skills,

The position offers lot of learning opportunities for the candidate by working with the #1 Interface and wide portfolio of IP Provider in the Industry.

whitetiger

回复 23# whitetiger


   As part of the Solutions Group at our Wuhan Design Center, China, the selected candidate would be working on one or more aspects of the development of DesignWare family of synthesizable cores, including Specification, Architecting, Design, Verification and Release engineering for Synopsys IP products. The domains would span across areas such as AMBA (AHB, AXI), USB3, Gigabit Ethernet, Multimedia Cards, and MIPI.

The candidate would be assigned to work on either the design or verification tasks based on aptitude and business needs; the candidate will be part of a global team of expert Design/Verification Engineers.
o    On the design side, the candidate would work on System level and RTL based hardware design using HDLs such as Verilog, and System Verilog; will use Lint tools for rule checking, Synthesis tools, and timing analysis; the designs may involve use of low power design techniques and implemented using Unified Power Flow.
o    On the verification side, candidate would work on latest verification methodologies such as UVM, VMM. The verification tasks would include building or enhancement of CRV based complex test environment, test case writing in OOPS based languages such as SystemVerilog, running tests and debugging failures; will include Functional coverage implementation and would involve  usage of industry standard simulators such as VCS.
Job Requirement for Fresh Grads:
· BSEE/MSEE in Electrical/ Electronic Engineering or allied subjects with minimum qualification marks of 70 % or CGPA of 7.0 and above, in aggregate of all semesters.
· It is essential that the individual has –
· aptitude to work in the VLSI domain,
· strong Digital Design skills,
· good communication skills,
· good analysis, debug and problem solving skills,

The position offers lot of learning opportunities for the candidate by working with the #1 Interface and wide portfolio of IP Provider in the Industry.

whitetiger

回复 24# whitetiger


   Job Description: Software Engineer, Software Tools/Operating System Development and Integration
We are a team building software engineering tools used with the ARC family of 32-bit configurable processors. Our product line includes open-source and Synopsys-optimized IDEs, compilers, debuggers, utilities, runtime libraries, simulators and operating systems.   We are looking for a software engineer like you to be part of our team to help us develop and benchmark our products by using the skills and knowledge you learned in your computer science program.
Responsibilities:
•     Work on key components of our tools e.g. IDE, libraries, simulators and operating systems e.g. Linux.
•     Develop and execute product test suites
•     Do performance analysis of our tools via benchmarking and instrumentation and maintain our performance regression system
• Diagnose tool issues, create test cases and verify the fixes
Investigate new software standards for use by Synopsys and our customers Required Qualifications:
•     Strong computer science background
•     Proficiency with C, C++ and scripting languages
•     Software development tools experience e.g. subversion, GIT, Bugzilla, Linux, Visual C++, or GNU
•     Excellent teamwork and communication skills
•     Versatility and willing to show initiative
Optional Qualifications
•     Master’s Degree in Computer Science
•     Proficiency with Java for GUI development
•     Embedded system or computer architecture knowledge
•     Initial understanding of internals of development tools such as compilers, debuggers, simulators
•     Assembly language programming experience
•     Use and participation in open source projects

whitetiger

回复 25# whitetiger


   Job Description:

We are a team working on producing the highly optimized hardware IP for the ARC family of 32-bit configurable processors.  We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers to develop highly optimized and very sophisticated embedded designs.
To develop and maintain our micro-processor hardware IP including, specification, implementation and test To optimize designs for performance, speed, size and power and to improve verification test suites Creation and execution of  Hardware IP Verification Plans Development of processor testbenches using latest verification technology To develop new tests to improve functional/code coverage Interact with tools, modeling and simulation teams globally to deliver optimized solutions for our customers Perform various benchmarking and engineering testing tasks to improve overall product quality Job Requirement for Fresh Grads:
Strong desire to work with embedded processors or processor based systems · Knowledge of HDL design and ideally, RISC architectures
· Understanding of programming at assembly and C/C++ level
· Understanding of Hardware Verification Methodologies and best practices – Coverage Driven Verification, constrained random testing, VMM, eRM, OVM, UVM
· Understanding of design/verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera
· Knowledge of Perl or other scripting languages for flow automation
Knowledge of tools such as, RTL Simulators, e.g. VCS, IES, Questa Knowledge of Operating Systems such as, Linux, Windows XP/Vista Good analytical skills Analysis of product testing requirements Ability to analysis test results and provision reports Excellent written and verbal skills including: Written and spoken English Detailed status reporting Ability to present results to the program management teams A Bachelor’s degree in engineering is a minimum requirement Team player with excellent communications skills motivated to work in a global development environment Self-motivated

cannot

唉，你贴得累，我们看着也累，^_^

whitetiger

回复 27# cannot


   都累死了。。。。

whitetiger

有朋友们感兴趣的话，发信息给我哦！！

whitetiger

做模拟、IP的，或者有兴趣做模拟和IP的，或者想跳槽的，都可以联系我。