针对老牛一样慢的仿真，如何把多核的优点发挥出来（讨论）

小丫

eaglelsb

要是HSPICE软件不给力，那也没办法啊，看看现在支持多核不，有无相关选项设置。

小丫

Magma号称可以进行并行仿真，不知道fineSIM2009是否支持并行仿真？是否支持数模混合仿真？仿真精度和速度如何？
有没有用过FineSIM的牛人出来介绍一下。。

xuyijun2513

貌似你装一个5.0的linux支持64位    再装个新版本的Hspice  可以支持多核   反正我们公司是可以跑   Hspice --help里面有那个指令   你去试试

xuyijun2513

回复 1# 小丫


   hspice -mt 2 -i circuit.sp -o hspiceout    其中   -mt 2是用双核的意思

小丫

多谢多谢，非常给力

yuanwolf2008

学习了哦，呵呵

smartzmz

spice的内核这么多年也都稳定了，不知道有没有并行版的，其实这类模拟计算很适合用GPU来做

chipless

HSPICE Precision Parallel (HPP) technology enables analog and mixed-signal design teams to get the best out of multicore computers for their SPICE simulations by enabling a greater percentage of the simulation to be parallelized. In fact, HPP technology delivers up to 7X simulation speed-up on 8 cores and 10X on 16 cores for analog and mixed-signal designs (see Figure 2). Using HPP technology, design teams can accelerate verification of their analog circuits across process variation corners, meet their project timelines and reduce the risk of silicon respins.

HPP technology is a new multicore transient simulation extension to HSPICE for both pre- and post-layout of complex analog circuits such as PLLs, ADCs, DACs, SerDes, and other full mixed-signal circuits. HPP technology does not compromise HSPICE accuracy. Because HPP technology manages memory efficiently, it has the capacity to simulate post-layout circuits consisting of more than 12 million elements.

Boosting Single-Core Speed
As well as accelerating HSPICE on multicore platforms, HPP technology gives HSPICE simulation a big boost even on single cores.

Today’s analog circuits incorporate components that operate at different time constants. For example, a PLL consists of a voltage-controlled oscillator and divider operating at a high frequency, while other circuit components, such as the phase detector, the filter and the digital control circuitry, operate at much lower speed. The adaptive sub-matrix algorithm in HPP technology manipulates the matrix in such a way that slower parts of the circuit can be solved in fewer iterations than the faster ones, significantly improving the overall simulation speed.

Figure 2 shows the average HSPICE single-core speed improvements over the past five years, alongside other improvements in multicore scalability, capacity, analog analysis features, convergence performance and distributed processing performance. The improvements have resulted in a significant speed-up over the past four years, equivalent to 50X for a 16-core platform.