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本帖最后由 jiangyanjin 于 2010-7-19 17:07 编辑
招聘模拟设计工程师，版图工程师，测试工程师，工作地点在上海！
有意的把简历发到我邮箱吧，frankie.jiang@maxllent.com
Position 1:
Sr. Analog IC Design Engineer
Responsibilities
Responsible for design of analog or power management IC implemented in CMOS/BiCMOS submicron foundry technologies, consisting of amplifiers, voltage and current references, comparators, power switches, and data converters. Develop circuit topologies, perform circuit design and simulation. Perform layout supervision including backend checks such as DRC and LVS. Assist in developing test specifications and test plan and in evaluating and characterizing prototypes.
Requirements
- 5+ years of industrial experience with analog and mixed signal IC design
- Proficiency in layout/verification guidance, and chip debugging
- Experience in one or more of the following areas is preferred
- Power ICs and systems
- High voltage process
- High voltage analog design
- BSEE/MSEE required
Position 2:
Analog IC Design Engineer.
Responsibilities
Responsible for design of analog or power management IC implemented in CMOS/BiCMOS submicron foundry technologies, consisting of amplifiers, voltage and current references, comparators, power switches, and data converters. Develop circuit topologies, perform circuit design and simulation. Perform layout supervision including backend checks such as DRC and LVS. Assist in developing test specifications and test plan and in evaluating and characterizing prototypes.
Requirements
- MSEE or to be graduated.
- Good oral and written skill
- Good communication skill
- Great learning will and capability
Position 3:
Sr. Layout Engineer
Responsibilities
Perform full-custom analog and mixed-signal IC mask layout on challenging IC designs. Responsibilities include all aspects of IC mask design, including chip planning; device, cell block, and top level layout and verification; preparing bonding diagrams; generating mask data. Excellent opportunity to expand technical skills, bring products to market successfully and reap the rewards.
Requirements
- 3+ years of layout experience in analog and mixed-signal layout
- Excellent communication skills and attention to details, and exhibit a sense of project ownership
- Experience in full chip layout and tape-out
- Familiar with layout design and verification tools
Position 4:
Layout Engineer
Responsibilities
Responsible for creating analog and mixed-signal IC layout at the transistor level based on schematics provided by the IC design engineer; putting together the top level of the chip, including the pad ring and pads; verifying the correctness of the layout by using DRC and LVS tools; working with circuit design engineers to understand the electrical and layout constraints for a given project.
Requirements
- 1~2 year experience in analog and mixed-signal IC layout
- Familiar with layout and verification tools
- Knowledge of DRC and LVS highly desirable
- BSEE or higher
- Good communication skills
Position 5:
Lab Test Engineer
Responsibilities
Responsibilities with design and product engineers
Responsible for lab setup/maintenance, product test, and customer support. Interface with design and test engineer to support all company products
Requirements
- BSEE with 1+ years of industrial experience with analog/mixed signal IC lab testing.
- Proficiency in chip test setup, debug, and equipment usage.
- Good communication skills.
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发表于 2010-7-19 17:04:27
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