高增益全差分运放设计者比看的一篇文献

huasheng2008 · 发表于 2008-12-3 09:02:45

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特别的辅助运放的设计上，有很详细的解释

vincent984 · 发表于 2008-12-3 10:06:36

拿来学习！谢谢楼主！

leserlee · 发表于 2008-12-3 10:45:09

robberxiong · 发表于 2008-12-3 14:02:54

学习权威！

s2618017 · 发表于 2008-12-3 17:54:03

:很好的資料~~
Abstract -A technique is presented that combines the high-frequency
behavior of a single-stage op amp with the high dc gain of a multistage
design. Bode-plot measurements show a dc gain of 90 dB and a unity-gain
frequency of 116 MHz (16-pF load). Settling measurements with a
feedback factor of 1/3 show a fast single-pole settling behavior corresponding
to a closed-loop bandwidth of 18 MHz (35-pF load) and a
settling accuracy better than 0.03%.