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Stanford大学2008课程讲义[size=-0]Course Description
EE313 Digital MOS Integrated Circuits;
[size=-1]Analysis and designof digital integrated circuits in CMOS technology. Development ofdifferent models for MOS transistors and how to use them to analyzecircuit performance. Use of computer-aided circuit analysis. Logicfamilies and "styles" including fully complementary static logic,dynamic, pass-transistor, and pulse mode logic. Topics include sizingfor minimum delay, noise and noise margin, power dissipation. Memorydesign (SRAM) as a motivating example.
Lecture 1 - Intro and Modeling
Lecture 2 - RC Modeling and Calibration
Lecture 3 Memory Design
Lecture 4 - Delay Optimization and Logical Effort
Lecture 5 - Decoder Optimization
Lecture 6 LE in the Real World
Lecture 7 Lower LE Gates
Lecture 8 - Low Field MOS Transistor Model
Lecture 9 - High Field MOS Transistor Model
Lect 10 - Using MOS Models
Lect 11 - Cap Models
Lect 12 SRAM Column Circuits
Lect 13 What Makes Gates Digital
Lect 14 Diff Pairs - Current Steering Logic
Lect 15 - Static Sense Amplifiers
Lect 16 MOS Matching Clk SenseAmps
Lect 17 SRAM Noise Margins / Noise
Lect 18 - Timing Gen and Array Partitioning
Lect 19 Adv Clocked Logic
Lect 20 Low Swing SRAM
Lect 21 - Introduction to Solid State
Lect 22 Threshold Voltage, Leakage and Tunneling
EE313 Digital MOS Integrated Circuits.rar
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[ 本帖最后由 xyj107 于 2008-10-14 08:41 编辑 ] |
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