西安/日照--模拟IC Leader（音频方向）

inchip-3

看西安、日照机会的朋友，请联系我哈
手机号同微信号：18610740688


In this role, the key responsibilities are the following:
-Involved in specifications of analog portions of IC
-Behavioral modeling to validate architectures
-Transistor-level feasibility studies for various blocks in ADC/DAC/CODECs
-Crafting blocks and documenting design towards formal design reviews
-Drive mask design to implement layout view of designs
-Top-level simulations to validate top-level integration
-Schematic entry, HSPICE simulation, Monte Carlo simulation, layout DRC/LVS, parasitic extraction and post-layout simulation
-Defining production/bench-level test-plans
-Taking lab measurements to validate analog designs
-Driving/reviewing yield/lab test results to drive bug fixes
-Design for ESD compliance

Candidate Requirements:
-Masters Degree with 5+ years in related area of expertise or PhD with 2 years of experience
-Deep knowledge of ADC/DAC/CODEC architectures and knowing which are suitable for given applications
-Deep knowledge of band-gaps, bias, op-amps, switched-cap circuits, LDOs, feedback and compensation techniques
Proven expertise in the following areas:
-Significant knowledge of low noise design techniques
-Significant knowledge of high precision techniques in presence of device mismatch Experience in C / Matlab / Verilog modeling
-Strong device physics knowledge as it applies to analog IC designs
-In-depth knowledge in HSPICE, HSIM, AFS, XA Virtuoso, Composer and layout tools as well
-Proven working experience in using spectrum analyzers, oscilloscopes, signal generators, etc. to validate analog designs
-Extensive experience working with production test engineers to firm up test plans and design for testability details