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IP team, designer needed. Email: yzr635816@126.com
JOB DESCRIPTION
RESPONSIBILITIES:
- Develop micro-architecture for GPU blocks based on architecture requirement.
- Develop RTL codes for GPU blocks in Verilog HDL
- Hardware optimization for GPU blocks on performance, power and area
- Synthesis and closely working with physical design for timing closure
REQUIREMENTS:
- MS degree of EE with 8+ years working experience in ASIC Company
- Strong RTL design capability and has experience on large digital ASIC product
- Familiar with front-end ASIC design flow and EDA tools
- Familiar with UNIX/Linux working environment and script language (tcl, perl etc.), C/C++ programming preferred
- Fluent English on communication, presentation and writing documents
- Work independently with limited supervision, strong sense of work planning and on-time delivery
- Computer architecture and computer arithmetic knowledge is a plus
- Computer graphics knowledge is a plus
EDUCATION: BS+ 8 years or MS + 6 years or PhD + 2-3 years Electrical Engineeringand/or Computer Architecture work experience
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