NO.487-ASIC RTL Design Engineer(Shenzhen)

kthr

Primary Responsibilities
- Design RTL for our CPU-centric Machine Learning ASIC chip
- Optimize timing and power consumption
- Support functionality debug in simulation and emulation
- Write timing/power constraint for the design

Qualifications
MUST
- MS or PhD degree in Electrical Engineering, Computer Science, Physics, Mathematics or equivalent disciplines.
- MS with > 2 years of industrial experience; more experiences and capability will correspond to higher job levels.
- Excellent RTL design skills with System Verilog.
- Good scripting skills with Python/Perl/Tcl.
- Solid understanding of low power optimization.
- Proficient communication in English - both orally and in writing form.
- Self-driven, result-oriented; able to multi-task and determine priorities.
- A proven fast learner and a team player.
PREFERRED
- Knowledge and experience with RISC-V ISA is highly desired.
- Knowledge about CPU architecture and memory hierarchy.
- Experience of working with foreign coworkers and remote teams is a plus.


KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.

If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“凯轶—KT咨询”微信也可查询职位啦！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“凯轶—KT咨询”即可添加，欢迎大家关注！
或者直接扫我哦！

shancjb

dingyigexian