Senior ASIC Backend Design engineer/高级Asic后端设计工程师
RESPONSIBILITIES:
- Execute the whole Backend Design flow include Floorplan/Placement/CTS/Routing/Physical Verification
- Work with front end design Engineers to achieve timing closure for both partition level and full chip level
- IO ring design
- Cross talk Analysis
- IR Drop and Power Integrity Analysis
- Execute ECO's.
- Develop and enhance entire physical design flow from frontend (pre-layout) to backend (post-layout) at both chip and block level.
MINIMUM REQUIREMENTS:
BS or MS in Electrical Engineering or Computer Science
Relevant ASIC experience ideally with a focus in the chip integration /synthesis/formal and timing closure
Excellent scripts skills
Keep up to date with leading edge technologies
Work under pressure