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[招聘] AI芯片研发公司前端综合职位招聘

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发表于 2018-9-13 15:30:41 | 显示全部楼层 |阅读模式

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AI芯片研发公司前端综合职位招聘,有兴趣可联系,微信18163979512,邮箱daisy@hibohr.com


Digital Implementation Engineer

职位概述

岗位职责

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Responsible for digital logic synthesis, STA, formal verification, DFT, power analysis, RTL design quality checking.

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Responsible to develop timing constraint and low power design constraint

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Responsible to co-work with physical design team for timing closure

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Responsible to optimize digital frontend flow qualification

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Responsible to develop signoff methodology for standard PVT and non-standard PVT.

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Responsible to block level digital implementation.

任职条件

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Major in CS, EE or related, MSEE required

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2+ years working experience is preferred.

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Deep understanding of timing signoff flow.

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Good knowledge of digital logic design, synthesis, formal verification, etc.

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Good experience with Design compiler, Prime time and Formality/Conformal LEC, spyglass/0in.

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Experience of DFT/MBIST is a plus.

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Hands-on experience in full-chip/block level, place and route, floor planning, power and clock optimization is a plus.

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Implementation experience on 28nm or above process node is plus.

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Familiar with common UNIX utility such as Shell, Perl, TCL, good scripting ability.

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Good English communication skills.

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Good initiative and motivation in a challenging environment.

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