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AI芯片研发公司前端综合职位招聘,有兴趣可联系,微信18163979512,邮箱daisy@hibohr.com
Digital Implementation Engineer 职位概述 岗位职责 •
Responsible for digital logic synthesis, STA, formal verification, DFT, power analysis, RTL design quality checking. •
Responsible to develop timing constraint and low power design constraint •
Responsible to co-work with physical design team for timing closure •
Responsible to optimize digital frontend flow qualification •
Responsible to develop signoff methodology for standard PVT and non-standard PVT. •
Responsible to block level digital implementation. 任职条件 •
Major in CS, EE or related, MSEE required •
2+ years working experience is preferred. •
Deep understanding of timing signoff flow. •
Good knowledge of digital logic design, synthesis, formal verification, etc. •
Good experience with Design compiler, Prime time and Formality/Conformal LEC, spyglass/0in. •
Experience of DFT/MBIST is a plus. •
Hands-on experience in full-chip/block level, place and route, floor planning, power and clock optimization is a plus. •
Implementation experience on 28nm or above process node is plus. •
Familiar with common UNIX utility such as Shell, Perl, TCL, good scripting ability. •
Good English communication skills. •
Good initiative and motivation in a challenging environment. |