AI研发公司北京上海CPU GPU方向芯片设计验证职位招聘

daisyyang

AI研发公司北京上海芯片设计职位招聘， CPU/GPU 方向急需，有兴趣联系，电话和微信18163979512，邮箱daisy.yang@hibohr.com

芯片设计

岗位职责

1.             Participate in DLA（Deep Learning Accelerator）, GPU or other SOC IP design for all frontend phase

2.             Specification define

3.             RTL implementation

4.             Analysis and optimization for performance

5.             Analysis and optimization for power

6.             Analysis and optimization for timing

7.             Design flow: lint/synthesis/sta/formal check

8.             Silicon debugging

任职条件

1.
MS with 5+ or 3+ years of experience in ASIC design

2.
Experience with DLA （Deep Learning Accelerator）or GPU related IPs design are highly desirable

3.
Experience with CPU related IPs design are highly desirable

4.
Experience with PCIE, CCIX or other high speed interface IPs design are highly desirable

5.     
Experience with all phases of frontend architecture, design and validation

6.      RTL Coding, design reviews, SYN, CDC, FEV

7.      Demonstrated work experience with timing analysis, area and power optimizations, performance analysis, debug ability, ECOs, and post-silicon debug

8.      Excellent knowledge of Verilog and popular EDA simulation & implementation tools

9.      Good experience in scripting languages like Perl, Unix shell or similar languages

芯片验证

岗位职责

1. Develop test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's

2. Create verification environment for both directed and random verification

3. Create reusable bus functional models, monitors, checkers and scoreboards

4. Drive functional coverage driven verification closure

5. Work with architects, designers and post-silicon teams

任职条件

1. MS with 5+ or 3+ years of experience in design verification

2. Experience with RISC CPU (RISCV/MIPS/ARM) related IPs verification are highly desirable

3. Experience with USB/MIPI_CSI/MIPI_DSI or other high speed interface IPs verification are highly desirable

4. Experience with Deep Learning Accelerator related IPs verification are highly desirable

5. Excellent knowledge of popular EDA simulation tools (VCS or equivalent simulation tools, debug tools like Debussy, Simvision)

6. Experience in System Verilog or similar HVL is highly desirable

7. C++ programming language experience desirable

8. Scripting knowledge (Perl/shell)

9. Excellent communication skills and ability to lead highly competent team.