上海张江 -- 某国内初创AI公司：SOC implement engineer (Sr/Staff)

清扬如昀

国内某初创AI芯片公司招收SoC implement engineer。薪酬诱人，福利优厚，专业能力强，不打卡，不强制加班。

地点：上海张江

Responsibilities:

Responsible for Front-End chip integration and implementation, including design, implementation and execution of the FE flow that starts with RTL code and ends with the delivery of a netlist package ready for physical design.

Responsible for ASIC design methodology and flow development, interfacing with EDA vendors on technology.

Job Requirements:

• Familiar with Verilog RTL design and has experience of large digital ASIC project.

• Familiar with Front-End flows (Synthesis/Timing/LEC/CDC/DFP/ECO etc.) and EDA tools (DesignCompiler/Genus, PrimeTime, Formality/Conformal, Spyglass/0in, VSI, ICC2/Innovus etc.)

• Familiar with unix/linux and scripts (tcl, perl or python etc.)

• Experience in Back-End flow is a plus

• Experience in high-performance computing design/interfacing IP is a plus

• Fluent English on talking, presentation and writing documents.
  

• Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.

• Master with at least 3 years or Bachelor with at least 5 years working experience in ASIC area

有意者，请邮件至：bermuda2018@163.com
谢谢！

hit_troy

Staff写错了……