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内部推荐,简历请投 jicheng295ic@163.com
1. ASIC/Layout Design Engr: IP/ASIC design or verification experience
2. Mgr , ASIC Digital Design: Team management, Timing constraints and floorplan-aware synthesis. DFT, ATPG Validation
3. Analog/Mixed-signal custom layout design, advanced Finfet technology |
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