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招聘职位： SeniorDigital Backend Design Engineer
JobSummary As amember of the core backend team, you will be responsible for the physicalimplementation (from netlist to tapeout) of a highly complex SOC utilizingstate of the art process technology.
Description •
Workwith FE team to understand chip architecture and drive physical aspects earlyin design cycle. •
Designautomation; Construct, Guide, Modify, Enhance Timing tools and flows. •
Toplevel floorplan, partition floorpan, P&R, timing and physical sign off.
KeyQualification •
Theideal candidate will have a minimum of 5-8 years of physical design experience,with recent successful tapeouts in deep submicron technology. •
Expertin top /block level P&R implementation, including floorplanning, clock& power distribution, timing closure, physical & electricalverification. •
Experiencedin industry standard tools, understand their capabilities and underlyingalgorithms. •
Strongcommunication skills. •
Familiarwith DC, ICC2 and power sign off tool is a plus •
Experiencewith DDR, PCIE is a plus •
Strongscripting abilities in PERL are needed; TCL or Python is a plus.
Education BS/MSCE or EE.
DigitalBackend Design Engineer
JobSummary Inthis visible role you will be responsible for the block level physicalimplementation (from netlist to tapeout) utilizing state of the art processtechnology.
Description •
Toplevel floorplan, partition floorpan, P&R, timing and physical sign off.
KeyQualification •
Theideal candidate will have a minimum of 3-5 years of physical design experience,with recent successful tapeouts in deep submicron technology. •
Familiarwith block level P&R implementation, including floorplanning, clock &power distribution, timing closure, physical & electrical verification. •
Strongcommunication skills. •
Familiarwith DC, ICC2 and power sign off tool is a plus •
Experiencewith DDR, PCIE is a plus •
Strongscripting abilities in PERL are needed; TCL or Python is a plus.
Education BS/MSCE or EE
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发表于 2017-9-15 09:13:07
