Cadence 上海 招聘高级产品验证工程师/产品工程师-数字后端

kengteng

投递方式：
If you have interest , PLS send your update CV to job_china@cadence.com(简历投递格式：姓名+学校+申请职位+工作地点)

可接受2017年优秀应届硕士、博士生。

1.   Lead Product Validation Engineer II (Req: R20775)
  
Position Description:
This PV engineer mainly works for advanced STA (Static Timing Analysis) and   
DelayCal features validation:
Qualify delay calculation and timing analysis result in Innovus system;
Maintain comprehensive regression suites for monitoring STA & delayCal stabilities;
Upgrading regression cases to use advanced design node data and check the impact;
  
Position Requirements:
-Master degree or bachelor degree with 2~3 years working experience;
-Solid background knowledge in digital backend design, knowledge in STA or delayCal is a strong plus;
-Be familiar with Linux system, and scripting skills with TCL or PERL or Shell;
-Patient, and good responsibility;
-Good communication in English and Chinese.


2.  Lead Product Validation Engineer II (Req: R20405)

-Position Description:
The engineer will work on Innovus QOR validation. Monitor flow QOR in weekly     
basis, debug QOR issues deeply across whole implementation flow from placement to CTS and to post route optimization. Also need to debug synthesis flow depending on project demand. Also the engineer need to write scripts to improve efficiency.
  
Position Requirements:
-Master degree or bachelor degree with 2~3 years working experience;
-Solid background knowledge in digital backend design
-Be familiar with Linux system, and scripting skills with TCL or PERL or Shell;
-Patient, and good responsibility;
-Good communication in English and Chinese.

3.   Product Validation Engineer II (For Fresh graduate)
     
Position Description:
1.This engineer will work in Encounter block implementation product validation team. The responsibilities include:
2.Assist in Cadence EDI development and validation Validate and maintain comprehensive unit and flow test cases for Encounter Digital Implementation System.
3.Develop test suites of the new features of EDI functions

Position Requirements:
-MS of EE/CS
-Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus
-Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
-Good communication in English and Chinese, good confidence and self-motivation.