在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
芯片精品文章合集(500篇!)    创芯人才网--重磅上线啦!
查看: 1751|回复: 0

[招聘] 产品测试工程师/数字芯片设计/模拟芯片设计

[复制链接]
发表于 2017-1-1 17:42:11 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
芯片测试工程师
Responsibilities:
1. Product (IC) test definition, test program development and test flow maintenance.
2. Hands-on experience, programming and execution of test/test-flows on Memory testers (Advantest T5581/T5585/T5593, verigy93000, etc).
3. Set up test environment specific to certain tasks and play with test conditions, work with oscilloscope and logic analyzer for test program debugging and failure analysis.
4. Verify functionality and performance of memory products, work with designer to identify design issues.
5. Characterization of electrical and timing parameters according to the product data sheet.
6. Support Field Application Engineers to identify and analyze problems at the end-customers.
7. Test coverage development and test time optimization during product development and production test maintenance.
8. Assist on the definition and specification of test-hardware (hifix, socket, load-boards, etc).
Requirements:
1. Master or PhD degree in Computer Science, Electrical and Electronic Engineering, or relevant.
2. Basic knowledge in semiconductor physics, integrated circuits, and IC process technologies.
3. Familiar with UNIX system and Solid Programming skills (C, C++, Perl, etc).
4. Interested in working in a lab-environment and conducting hands-on measurements
5. High frequency measurement knowhow is desired.
6. Highly motivated and engaged, independent problem solving skills.
7. Good communication and presentation skills.
8. English language skill in writing and speaking is a must.
CAD engineer
Responsibilities
• Support, Definition and Implementation for CAD Methodology and Design Flow Environment
• Expert-level support for day to day design flow environment related issues
• Create and maintain design flow environment development and usage document
• Continuous improvement of the Design Flow and Methodology (Analysis, Strategy Definition and Implementation)
• Support EDA tools used in the company design flow environment, focusing on full custom  design and verification areas

Experience / Knowledge in Keywords
• Masters or Bachelor degree in Electrical Engineering, Communications or equivalent university programs
• 2+ years of experience in CAD for the semiconductor design group or equivalent
• Strong programming skill on Cadence Skill and Calibre Rule
• Strong programming background and proficiency in UNIX, C-Shell, Python and Perl
• Preferably experience with commonly used EDA tools from Cadence, Synopsys, etc
• Open and collaborative working style within larger international teams
• Possess good communication skills as well as problem solving skills
1.         版图设计工程师
Responsibilities:
1.    Full custom layout for Analog and digital circuits in High performance Chips.
2.    Floor planning signal- and bus planning according to predefined specifications.
3.    Chip size optimization.
4.    Area- and parasitic optimized layout.
5.    Assembly of BLKs and top level hierarchies including routing.
6.    Verification of circuits (Design Rule Check, Layout versus Schematic, Electrical rule check).
7.    Generation of fill structures according to technology requirements.
8.    Optical simulations on technology driven circuits.
9.    Investigations on Electro migration and IR drop.
Requirements:
1.    Bachelor in Microelectronics, Electronic Engineering, or related field.
2.    Familiar with CAD software.
3.    Familiar with semiconductor process and structures of devices.
4.    Team oriented, love to work in young, international and highly motivated teams.
5.    Good communication skills.
6.    High grade of flexibility.
7.    Highly motivated and engaged.
8.    Experience in digital analog and/or mixture signal IC is preferred.
9.    Experience in backend design flow (APR) is preferred.
10.    English language skill in writing and speaking is a must.
嵌入式工程师
岗位职责:
1.根据DRAM/flash产品应用环境的不同,编写测试DRAM(DIMM)/flash产品的测试程序;其中应用环境包括arm,安卓,或国产cpu和传统X86架构系统等;根据DRAM/flash产品的特点来制定满足客户规范的系统级测试方案,并执行测试方案;
2.根据公司项目或者客户的需求,不断的优化和改进DRAM(DIMM)/flash产品的测试程序,以提高产品测试效率和覆盖率;根据客户的需求来不断的优化和改进DRAM/flash系统级应用测试方案;
3.执行产品的系统级测试方案,和不同部门以及项目负责人良好合作,及时反馈产品可能在设计、晶圆和产品终测中出现的问题,并协助各相关部门解决测试中的问题;分析公司产品在各种平台应用中(计算机、服务器、嵌入式系统等)出现的技术问题,协助提高产品测试覆盖率;
4.制定产品的规格书以及客户需要的相关文档等;和不同部门以及项目负责人良好合作,协助各相关部门解决测试中的问题;
5.在应用测试中观察和反馈产品可能在设计、晶圆和产品终测中出现的问题;
6.制定产品的规格书以及客户需要的相关文档。

技术要求:
1.在半导体相关行业公司工作3年以上的研究生或者本科生, 计算机或者电子专业;
2.熟练掌握计算机系统相关的知识包括主板、CPU、芯片组和操作系统等;
3.编程语言的掌握:
(1)        熟练掌握C/C++语言,有丰富的编程经验;熟悉汇编语言,;
(2)        有ARM或安卓系统的底层驱动程序开发的相关经验,了解LINUX系统;
(3)        对FPGA有一定的了解,有一定的Vhdl编程经验;
4.了解半导体相关的知识包括工艺和电路等;
5.熟练掌握测试设备包括示波器和逻辑分析仪;
6.了解计算机编程语言包括C和汇编语言;
7.有良好的英语口语和书写能力;
8.能够独立完成工作并解决问题;
9.能够跨部门协作工作。
职位名称:         Digital Design Engineer       
工作地点:         西安
职位描述:       
Responsibilities:
1.Responsible for developing complex digital designs with emphasis on Front-End, including Coding, Simulation, Constrain and Synthesis.
2.Responsible for developing high-speed digital designs with Schematic, including schematic, simulation and timing/power/performance optimization.
3.Check the relative block layout implementation.
4.Test-bench and Test-pattern generation to full-cover the relative design.
Requirements:
1.Bachelor, Master or PhD in Microelectronics, Electronic Engineering, or related field, more than 2 years experience, Knowledge.
2.Experience with digital design (verilog /schematic) and simulation (modelsim, NC-sim, Nanosim) is a plus.
3.Experience in Flash、SRAM and DRAM design is preferred.
4.English language skill in writing and speaking is a must.
Character:
1.Team oriented, love to work in young, international and highly motivated teams.
2.Good communication skills and High grade of flexibility.
3.Highly motivated and engaged.
if you are interested in this job, pls contact me.
my email:jine1220@126.com
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /2 下一条

小黑屋| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-5-10 12:32 , Processed in 0.015078 second(s), 6 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表