FPGA 芯得

jj_seu

Position: (Senior) FPGA Engineer简历发 boss@hi-talent.com微信 xinde_jane

Responsibilities:

1.FPGA design and verification. PortingASIC code to FPGA platform, verify the whole design in FPGA system.

2.Lead the whole FPGA verification flow,include specification, coding, simulation, physical implementation and boardlevel debugging.

3.Organize and Coordinate the work of debugteam.

4.Capability of making rapidlyscheme/method to trace issue.

5.RTL module development to assist theverification on FPGA

Requirement：

1.BS with more than 5 years or MS with morethan 3 years in Electronic or Computer Science Engineering is required. Expertin FPGA operation theory.

2.More than 3 years experience in designand verify on FPGA.

3.Understanding of RTL (preferably Verilog)and strong digital knowledge

4.In-depth knowledge of FPGA synthesis andPAR tools (preferably Synplify ,Xilinx ISE and Vivado), knowledge with certifya plus

5.knowledge of Verilog/System-Verilog isrequired; UVM is a plus

6.Knowledge on Perl , Unix/Linux Shell aplus

7.Used to a collaborative workingenvironment(source version control tools, bug tracking system) a plus

8.Experience with ARM, 8051 embeddedprocessors

9.Enjoys lab work using test/measurementequipments (logic analyzer, oscilloscope, in-circuit emulator)

10.Strong trouble shooting and analyticalskills desired

11.Highly motivated, fast learner, teamplayer with good oral/written Chinese/English communication skills

12. Knowledge on HAPS,CHIPIT platform,cosim/coemu a plus