上海需要一位 Mixed Signal Layout Designer

KT咨询-IC电子

【猎头职位：上海需要一位 Mixed Signal Layout Designer】联系人：Grace-Tai，邮箱：hr@kthr.com，微信也可查询职位啦！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加，欢迎大家关注！
Purpose:
Depending on experience and ability the Custom Analog Layout Designer will fulfill one or more functions of increasing responsibility；
The analog layout designer works closely with the engineering team to implement custom device level mask designs using Cadence and Mentor tools in a version controlled design environment；
The analog layout lead at block level designs, reviews, verifiesand releasesIPs to internal chip projects, often overlapping responsibility as a direct layout contributor；
The chip layout lead will plan and integrate a top level chip product, often overlapping responsibility as a block lead：
1.Create, review, verify and deliver high quality layout that conforms to all design requirements；
2.Provide and maintain accurate schedule estimates；
3.Meet project milestone deadlines；
4.Independently debug complex design and PDK issues；
5.Drive and assist in project planning and design kit/methodology improvements.

Key responsibilities/duties:
1.Outstanding English written and verbal communication；
2.5+ years' experience in analog/mixed-signal layout；
3.Custom layout experience must include circuits such as ADC, DAC, and class D amplifier,PLL,RX,TX, high speed Serdes layout experience is preferred；
4.Full familiarity with Cadence Virtuoso tool suite；
5.Full understanding of hierarchical planning (top down and bottom up) and integration；
6.Experience including one or more process nodes: 0.18um, 65nm, 40nm, 28nm；
7.Excellent communication skills and teamwork；
8.Proficiency with design management tools.

Preferred:
1.Experience leading a team of layout designers；
2.Chip level management from project inception through tape out；
3.Proficiency with Virtuoso XL schematic driven layout design flow and tools；
4.Proficiency with Virtuoso IC61 product generation；
5.Proficiency with Synchronicity version control system；
6.Proficiency with Mentor Graphics Calibre and RVE debugging.

Qualifications:
Required: Bachelor/Master degree in Semiconductor, Electronics Engineering.