【NVIDIA英伟达】热招 ASIC Verification Engineer-Shanghai

NVHR

Hi All,

NV目前在上海招聘 ASIC Verification Engineer-上海,  1-5年工作经验，有兴趣的朋友欢迎发送简历到 tracyw@nvidia.com  QQ： 1751315121

收到简历，我会同你联系；

NVIDIA 视觉计算公司
在二十年的时间里，NVIDIA 一直在视觉计算方面 (计算机图形的艺术与科学) 勇当先锋。公司总部位于美国加利福尼亚州圣克拉拉。 1999 年在纳斯达克上市，代码为 NVDA。 2015 财年收入高达 46.8 亿美元。 公司在世界各地拥有 9,100 名员工。 持有的专利资产多达 7,300 项。
目前我们2016年 并行计算/ 图形类岗位  校招职位

Position Title:        ASIC Design/Verification Engineer (Clock)
The NVIDIA Clocks group is looking for a top ASIC engineer with extensive experience in high-speed logic design and verification. The complexity of clocking structure has grown substantially in order to support high frequency clock domains. Modern clocking design needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints.

Responsibilities:
- Design new clocks modules in order to support high frequency clock with all the above  constraints.
- Verify clock design with the industry standard tools and methods at unit and system level to deliver high quality clock modules.
- Ability to design novel techniques to distribute clocks over long distances with low insertion delay, skew and OCV effects.
- Perform STA on the designed clock modules.

MINIMUM REQUIREMENTS:
-BS / MS in electrical / computer engineering and related.
-Understand frontend ASIC design flow including RTL design, synthesis and timing analysis
-Familiar with verification methodology, tools and flow
-Strong programming skills in Perel and C/C++ is a plus
-Excellent analytical and problem solving skills
-Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a plus
-Fluent English (both written and spoken) and excellent communication skills
-Ability to interface with many groups,  easy to cooperate with team members

祝好
Tracy