|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
我老板招人,需要后端经验。
有兴趣请投递简历至:
286404234@qq.com
我会先跟您初步了解一下。
Job Description:
Physical design of deep sub-micron chips including block level floorplanning, place&route, cts, routing, physical verification, sta, si closure , power closure.
Qualification:
1. Master and above of EE.
2. Experience on place and routing, signal integrity, power analysis, CTS design, DFT, design rule and connectivity verification, sta.
3. Knowledgeable in all aspects of deep submicron ASIC design flow.
4. Familiar with Back-End (physical design) EDA tools.
5. Familiar with Front-End EDA tools or circuit design is a plus.
6. Familiar with Unix/Linux environment and good at scripts (tcl/perl).
7. Strong passion in achievement and career development.
8. Good English listening, writing and speaking ability.
9. Good communication skills, strong interpersonal skills and the flexibility. Dedicated, hard working and good team player. |
|