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Compnay Backgroud: One famous fabless who is pioneeringdeveloper of analog and mixed-signal digital media ICs for portable devices,high-end graphics, and large HD displays.
Description: The candidate is expected as an experienced engineer, capable of making reality of IC design and implementation. The person on this position will work closely with system team and marketing team, should be good at communication. The products focus on high speed mixed signal transmission; panel control for monitor, TV, tablet or cell phone screen, including the related frameworks and services. Responsibility: Report to R&D manager; Responsible for leading and managing ASIC project group from digital design, verification, to integration; Work closely with backend engineer for chip tape-out; Work closely with application engineer for chip bring-up, debugging and problem solving; Requirement: Bachelor, Master or above in Electronics Engineering, Communications, Microelectronics Engineering or Computer Science; At least 6+ years of experience in digital ASIC or SoC design and chip integration; Experienced on IC design flow, including coding, simulation, synthesis, verification, validation, DFT, ATPG and STA, etc.; Experienced on EDA tools such as Synopsis, Cadence or Mentor, know well about NC-Verilog, VCS, DC and Prime Time; System Verilog, VMM/OVM/UVM or System C/Testbuilder, etc. Self-driven and problem solving oriented; Good knowledge of Perl and shell programming would be an added advantage; Familiar with video/image process algorithm, TCON or DisplayPort is a big plus; Familiar with FPGA prototyping is a big plus; Capable of English writing and speaking.
Location: Beijing
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