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[招聘] 成都美资公司招聘数名logic design engineer

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发表于 2015-1-6 08:58:47 | 显示全部楼层 |阅读模式

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成都美资公司招聘数名logic design engineer,机会难得,请有意愿者发送中英文简历到邮箱: mapjohnlee@sina.com
祝大家新年快乐

Logic Design Engineer

Responsibilities


1. Product spec preparation
2. Digital circuit and module design & verification spec
3. Responsible for RTL design & simulation
4. Responsible for module & chip logic synthesis, static timing analysis and formal verification
5. Chip debug and testing after chip tape-out
6. Work with application engineers for customer support Requirements 1. More than 2 years of work experience in digital circuit design
2. Bachelor or above degree in Microelectronic or Electronic and Information Engineering
3. Good verbal and written English communication skill
4. Good team work spirit
5. Familiar with hardware description languages such as Verilog or VHDL
6. Good knowledge of test benches, synthesis and timing analysis, DFT is a plus
7. Familiar with IC design & verification tool flow with hands-on experience in DC, PT, RC, ETS, NC-Sim and spyglass
8. Good knowledge of script language, such as Tcl, Python, and Perl
9. Knowledge of MCU architecture especially ARM based MCU is a plus
 楼主| 发表于 2015-1-12 09:58:21 | 显示全部楼层
招聘正在进行中,大家抓紧哦
 楼主| 发表于 2015-1-19 16:26:50 | 显示全部楼层
此职位还在招聘中
发表于 2015-1-19 17:45:15 | 显示全部楼层
spasion?
发表于 2015-1-27 20:49:25 | 显示全部楼层
请问位置在哪里呢?西边还是南边?
 楼主| 发表于 2015-2-2 17:35:26 | 显示全部楼层
此职位还在招聘中,拿了年终奖的TX,可以考虑下哦
 楼主| 发表于 2015-2-12 08:58:58 | 显示全部楼层
此职位还在招聘中,拿了年终奖的TX,可以考虑下哦
 楼主| 发表于 2015-2-26 09:21:26 | 显示全部楼层
新年好,招聘继续
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