Cadence SH 招聘Principal Customer Engagement Engineer-数字后端

kengteng

Cadence SH 招聘Principal CustomerEngagement Engineer-数字后端

更多职位信息敬请关注Cadence公众微信平台：Cadence中国招聘

If you have interest, PLS send your update CV to zhangyl@cadence.com

Position Description:

1.The primary responsibility isdesigning, developing, troubleshooting and debugging software programs onUnix/Linux platforms.

2.Be involved in developingsoftware tools for advanced chip design platforms.

3.The responsibilities alsoinclude engaging with customers in understanding their ASIC design requirementsfor nano-technology process nodes and assisting them in adopting Cadence designplatform and helping them in performing successful tapeouts of theirSystem-on-chip designs using the same.

4.The job will also involvespresenting and demonstrating relevant Cadence technologies and carrying outproduct evaluations, workshops, trainings and competitive replacementcampaigns.

Position Requirements:

1.The candidates should havestrong in-depth P&R design experience in COT or ASIC area.

2.Experience and ability to getsolutions in Floor plan, Power Planning/Analysis, CTS, timingoptimization/analysis, signal integrity and DFM issues (DRC & Antenna) is aMUST. Strong interest and understanding of design methodologies are required.

3.Need to have good knowledge onVDSM (40nm and below) processes issues.

4.Good verbal and writtenpresentation are must.

5.Hands-on Cadence Encounterexperience is a big plus.

6.Minimum master degrees in EEor CS.