【上海/西安】招聘 数字后端设计工程师

jtianen

工作地点上海或西安。1.Senior Back-end Engineer
任职要求

- 微电子及相关专业，本科及以上学历，5年以上经验
- 深入理解ASIC后端设计流程，层次化设计方法及深亚微米工艺问题
- 精通后端主流EDA工具，需有SOC-Encounter经验
- 有65nm及以下级芯片成功流片经验
- 熟悉Tcl或Perl等脚本语言
- 熟悉Sign-off 方法学以及STA, Noise, Power等方面EDA工具软件的使用
- 优异的口语及书面英语沟通能力
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工作职责

- 开发和优化高性能和低功耗系统级芯片物理实现方法
- 模块和芯片级的物理实现，包括布局规划、布局布线、时钟树综合、时序和功耗分析等
- 在客户办公室从事物理实现项目
- 与芯片代工厂和IP供应商积极沟通IP引入和测试定义
- 领导工程师团队


Requirements:

- BSEE or MSEE with 5+ years experience
- Strong understanding of backend ASIC design flow, hierarchical physical design strategies and methodologies, and deep sub-micron technology issues
- Familiar with EDA tools, SOC-Encounter experience is a must
- Successful track records of taping out complex, 65nm or below SOC chips.
- Design automation and analysis using scripting languages, particular Tcl and Perl
- Solid knowledge on sign-off methodology and EDA tools for STA, Noise, Power, etc.
- excellent verbal and written communication skills in English.
- A self-starter that is motivated and a good team leader/player

Responsibilities:

- Development and optimisation of high performance and low power SoC physical implementation methodology
- Perform block level and full chip implementation including floor planning, P&R, CTS, timing and power analysis etc.
- Design consulting in customer's offices on physical implementation tasks
- Interfacing with foundry and IP providers on IP imports and test definition
- Leading engineering teams
- Positive and good customer interface


2. Junior Back-end Engineer
- 微电子及相关专业，本科及以上学历，1年以上SOC-Encounter 或 ICC 使用经验
- 理解ASIC后端设计流程
- 熟悉Tcl或Perl等脚本语言
- 熟悉Sign-off方法及STA, Noise, Power等方面EDA工具软件的使用
- 良好的口语及书面英语沟通能力

工作职责

- 模块和芯片级的物理实现，包括布局规划、布局布线、时钟树综合、时序和功耗分析等
- 在客户办公室从事物理实现项目
- 与芯片代工厂和IP供应商积极沟通IP引入和测试定义


Requirements:

- BSEE or above with 1+ years SOC-Encounter experience
- Good understanding of backend ASIC design flow
- Design automation and analysis using scripting languages, particular Tcl and Perl
- Solid knowledge on sign-off methodology and EDA tools for STA, Noise, Power, etc.
- Good verbal and written communication skills in English.

Responsibilities:

- Perform block level and full chip implementation including floor planning, P&R, CTS, timing and power analysis etc.
- Design consulting in customer's offices on physical implementation tasks
- Interfacing with foundry and IP providers on IP imports and test definition



简历请发到396689320@qq.com

jtianen

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jtianen

急招！