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[招聘] [全职]AMD上海硬件软件工程师热招职位列表

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发表于 2014-5-14 14:52:14 | 显示全部楼层 |阅读模式

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AMD上海研发中心招聘以下硬件软件工程师,请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司名称_工作年限” 为标题,把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。

1. Senior graphics driver engineer
DESCRIPTION OF DUTIES:

- Develop and maintain the AMD GPU Graphics Driver
- Work with ASIC design team to tune Graphics Driver performance

PREFERRED EXPERIENCE:

- Master/Ph.D Degree of Computer Science, Mathematics or Electronic Engineerin
g
- 3+ years of experience of graphics driver development is a plus
- 3+ years of experience of C/C++ programming
- Knowledge of Graphics application developing under Microsoft Windows/Linux
- Knowledge of Computer Graphics
- Knowledge of x86 assembler language and x86/x64 CPU instructions
- Knowledge of PC architecture

2. Design Verificaiton Engineer(该职位倾向于毕业三年以下比较年轻有培养潜力的工
程师)

Key Job Functions:
- Understand the ASIC design/verification flow and help design/verification en
gineers to accomplish targets.
- Develop infrastructure and environment for SOC/IP level chip design verifica
tion.
- Closely working with Design/Architecture/Verification team to develop new ve
rification flow.

Preferred Experience:
- Major in EE, CS or related, Master Degree with 3+ years or Bachelor with 5+
years working experiences
- Familiar with Linux Environment (including command shell scripting)
- Skillful at script language like ruby, perl, or tcl
- Be good at C/C++ programming
- Should be versatile in any one of the high level verification flow such as S
V,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verific
ation
- Should have excellent communication skills (both written and oral)
- Strong problem solving skills
- Good knowledge on verification methodology

3.Senior graphics IP Verification Engineer
- Understand the architecture of the graphics IP and functional block being de
signed
- Build C/C++ model for simulation
- Build test bench and monitors for DUT
- Compose test plan and validation vectors to ensure functional completeness
- Debug function/performance bugs of graphics IP


Preferred Experience:
- Major in EE, CS or related, Master Degree with 2+ years or Bachelor with 4+
years working experiences
- Familiar with Linux Environment (including shell scripting and linux gnu too
ls)
- Experience with design for verification (assertion based design strategies,
code coverage, functional coverage, test plan, gate-level simulation, back-ann
otation etc.)
- Should be versatile in any one of the high level verification flow such as S
V,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verific
ation
- Should have excellent communication skills (both written and oral)
- Strong problem solving skills

4. MTS Design Verification Engineer for Graphics HW
Key Job Functions:
- Understand the architecture of the chip and functional block being designed
- Compose test plan and validation vectors to ensure functional completeness
- Develop verification environments for standalone unit testing and enhance/us
e the automated regression infrastructure setup for unit level, IP level and f
ull chip functional verification.
- Help debug and correct functional errors in the design blocks, using logic a
bstraction, simulation and debug tools, based on good understanding of the arc
hitectural specification, RTL and/or device level design of the block.
- Closely working with Design/Architecture/Circuit team to identify the Milest
ones and Quality metrics of the project that includes scoping, tracking and de
livery.
- Be responsible to mentor and coach the team for greater technical depth in F
unctional areas as well as the verification methodology improvement and Infras
tructure enhancements to support the design environment

Preferred Experience:
- Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+
years working experiences
- Should be versatile in any one of the high level verification flow such as S
V,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verific
ation
- Needs to have better understanding of Verification methodology and concepts.
- Should have good understanding of Pre-Silicon design process from Architectu
re, Design, Synthesis and Gate level Implementation till Tapeout release.
- Should have excellent communication skills (both written and oral) and shoul
d be able to participate cross functional engineering teams geographically.
- Familiar with Linux Environment (including shell scripting and linux gnu too
ls)
- Advanced programming knowledge on Verilog,C++
- Design for verification (assertion based design strategies, code coverage, f
unctional coverage, test plan, gate-level simulation, back-annotation etc.)
- Strong problem solving skills
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