DSP算法 验证 ASIC Digital Design 上海 北京

bestgrace

推荐公司信息：

DSP AlgorithmEngineer:

JobResponsibilities:

As a DSP (Digital Signal Processing)engineer for XXXX, the candidate will join a team of experienced scientists andengineers to develop exciting technology in image and video processing. The position willgive you an opportunity to combine your ingenuity with the next generation products in TV and Panel industry.Typical duties performed as follow:

1.
Design and implementation of video post processing algorithmsuch as true motion basedframe interpolation, super-resolution, noise reduction;

2.
Design and implementation of image algorithm such as local dimming, scaling, color enhancement, 2D to 3D

3.
Support the verification and optimization of algorithm according toHW requirements;

4.
Work with image quality team to improve image quality, andtune image quality according to requirements of customers.

MinimumRequirements

1.
Ph. Din EE/CS specializing in digitalsignal processing, image processing, video processing, computer vision, patternrecognition, or computer graphics;

2.
Thorough background in signalprocessing, image and video processing, statistical analysis and patternrecognition;

3.
Proven ability in designing,implementing, debugging and understanding complex algorithm;

4.
Solidprogramming skills in C/C++ and MATLAB;

5.
Strong analytical,creative, self-motivated, good communications skill;

6.
EnjoyR&D work, open and positive attitude;

AdditionalPreferred Skills

7.
Experience with IC design flow andmethodologies; experiences with algorithm design targeted for IC and FPGA;

8.
Previouslyworked on video processingalgorithms such as motion estimation, super resolution, deinterlacing, scaling, noise reductionis a big plus;

9.
Familiarwith digital videoalgorithm and interfaces;

10.
Strongcommunication skills,presentation skills, good organization and skilled in writing high qualityengineering documentation.

职位：集成电路IC设计/应用工程师

岗位职责：

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Thiscandidate should have mobile/high speed interface background and should beinteresting in R&D on Video related technologies.

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IC/IPbackground. Be interesting in developing and improving New IP.

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Integrationexperience, be able to own testchip tapeout.

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With atleast 3-years IP/Product R&D experience.

Job Description

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RTL coding,new logic design, simulation, synthesis.

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Workclosely with algorithm engineer to develop/debug new IP/product. Supports FPGAengineer debugging issues on FPGA system.

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Workclosely with system/SW engineer to verificate/validate new IP/product onFPGA/System platform.

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Deliverdesign/verification/application documents.

1.SeniorASIC Digital Design Engineer

Responsibilities:
l Responsible for logic design and verification in low-power wirelesscommunications chips.
l Also responsible for module-level lint checking, timing checking and formalverification.
Qualifications:
l Proficiency in logic design, simulation, synthesis and testing.
l Proficiency in Verilog and its simulation environment.
l Experience with low-power design.
l Good knowledge of SOC design.
l Experience in wireless communication or multimedia technologies is a plus.
l Experience in ARM and AMBA design is a plus.
l Self-motivated and good team player.
l MSEE or BSEE with 4+ years.

2.高级芯片后端设计工程师

Job Description
1、参与超大规模SOC芯片物理设计的全流程；
2、挑战实现业界速度最快、功耗最低的高性能SOC芯片；
Qualification
1、本科4年以上相关工作经验（硕士3年以上相关工作经验），并有实际的tapeout经验；
2、熟练掌握深亚微米后端物理设计流程；

3、熟练使用Synopsys,Cadence或Magma等数字芯片物理设计工具；

4、熟练使用Calibre等物理验证工具；熟练使用PT等时序验证工具；

职位：IC验证工程师

岗位职责：

Responsibilities:

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Responsibilitieswill include developing verification environment;

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developingtest plans for and verifying the function of ASIC;

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hands-onimplementation work for every aspect of ASIC verification, working closely withthe system group, architects, design and verification teams;

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Thesuccessful candidate should have experience going through at least one completeand successful ASIC design/verification cycle from architecting and creatingASIC test environment to full completion of the verification work.

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Thecandidate also needs to have a full understanding of design using Verilog andworking experience with SystemVerilog. A strong communication skill in bothChinese and English is required.

任职资格的具体描述：

Qualifications:

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5+ years ofASIC verification experience, complex SOC verification experience is preferred

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Strongprogramming skills in SystemVerilog

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Knowledgeablein Verilog/Verilog-PLI/SystemC/SVA/C/C++

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WorkingExperience with UVM/OVM/VMM (at least one of them)

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Responsiblefor implementation of verification environment and generation of high qualitytest cases.

Grace Li @Hi-Talent Consulting Co. , Ltd.

上海芯相会企业管理咨询有限公司

上海芯得企业管理咨询有限公司

E-Mail:bestgrace@qq.com

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tzl12345678

老板，上述那些职位是北京的？请注明。谢谢

tzl12345678

那些职位是北京的，老板？请注明！谢谢！