职位描述: Job description: 1.Follow working flow to implements IC design with emphasis on layout tasks, including floor plan, power planning, parasitic extraction, ESD, physical verification independently. 2.Can modify DRC, LVS runset files. 3.Can use Encounter to APR. 4.Generate and release tape-out kit. 5.documentations and delivery. 6.Training for new hires. Requirements: 1.A BS/MS degree in electrical engineering or related discipline.More that 3 years experience in physical design. 2.Expertise in analog/Mixed signal, IO,STD,Memory layout of high-speed &high-precision design. 3.Excellent knowledge in ESD, ERC, DFM,IR drop, EM, and IC manufacturing process in deep sub-macro design. 4.Experience in Synopsys/cadence design tools and flows. 5.Experience in scripting languages(Perl,Tcl,Shell,...)is plus. 6.Experience in PR is preferred. 7.Open mind, self-motivated, excellent communication skills and ability to excel in a team environment. |