AMD Soc 部门急招junior工程师2名--小硕毕业工作一年或本科工作3年

wz_cdj

大家好，
   通过一轮的推荐，部门已经招的差不多了，现在还缺junior工程师2名，要求硕士毕业工作一年，本科毕业工作3年。
  有意向的童鞋发简历到simba.chen@amd.com。或者加QQ 784451309咨询。
  招聘职位和要求如下：

Responsibility:

1 Integrate GPU blocks as chip based on architectural requirement.

2 Develop RTL code for macro blocks in Verilog HDL and make sure functional correct and reusable for different configuration.

3 Synthesis and deliver netlist that meeting timing, area and power requirement. Help PD on the floorplanning and close timing.

Requirement:

1MS degree of EE with 1 years, or bachelor with 3 years working experience in ASIC Company.  

2 Familiar with Verilog RTL design and has experience of large digital ASIC project.

3 Familiar with front-end EDA tools and flows (Design compiler, PrimeTime, Conformal,Verde)

4 Familiar with unix/linux and scripts (tcl, perl etc.)

5 Fluent English on talking, presentation and writing documents.  

6 Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.

.

wz_cdj

有synthesize,STA check, leda,CDC经验的童鞋比较适合我们组

wz_cdj

推荐的简历都将在国庆节后面试

wz_cdj

只剩最后一个名额了

wz_cdj

最后一个名额，定不下来

jycwxxwxx

你们现在人招满了么？现在还要简历么？

glace12123

本科3年如果做低端ASIC，你不会要，如果做高端ASIC，人家看不起你的junior职位，即使你是AMD。