【全职】AMD上海招聘ASIC verification 工程师

RecruiterAMD

AMD上海招聘ASIC verification 工程师，请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司名称_工作年限” 为标题，把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。

Essential Functions:

•              Development of infrastructure for verification of hardwar
e in GFX IP.
•              Develop verification environments for feature verificatio
n, and use th
e automated regression infrastructure setup for IP level and IP on SoC level f
unctional verification.
•              Low power design and verification for specific hardware f
unctionality
in Front-end.
•              Improve the low power IP delivery for variant SoCs

Requirements/Qualifications:

•              BS, MS or PhD in Electrical Engineering or Computer Scien
ce.
•              6+ years of ASIC verification or low power design experie
nce
•              Should have good understanding of Pre-Silicon design proc
ess from Arch
itecture, Design, Synthesis and Gate level Implementation till Tapeout release
.
•              Advanced programming knowledge on Verilog/SystemVerilog,
C/C++
•              Requires demonstrated technical expertise in the areas of
Design Verif
ication and low power design/verification methodology.
•              Knowledge on Perforce, OVL, SVA, SV, UVM, script programm
ing etc.
•              Should have excellent communication skills (both written
and oral) and
should be able to participate cross functional engineering teams geographical
ly.
•              Demonstrates leadership ability preferred.


Skills/Competencies:

•              Good design verification experience
•              Good communication
•              Strong problem solving skills
•              Low power design verification or computer graphics knowle
dge are plus


Desired:

•              Team Lead experience
•              Design Verification experience