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[招聘] Cadence SH 招聘 PD Engineer & Product Engineer for Analog Design

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发表于 2013-3-13 18:00:45 | 显示全部楼层 |阅读模式

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Cadence SH 招聘 Physical Design/ Lead Design Service Engineer & Product Engineer for Analog Design

If youhave interest, PLS send your update CV to colinh@cadence.com


Job Title
Technical Leader  or Lead  Service Engineer (Physical Design)

Position Description
1) The candidates should be senior in a way that they are not only technical excellent but also mature & able to talk to customers, coach & advise customers as well as other, following team members. This engineer should have excellent design experiences in the digital implementation domain including Floorplan, P&R, STA, Physical verification, DFM.
2) The engineer must have a solid background in circuits, electronics & physics & should be very willing to learn new stuff.
3) Key Accountabilities: Ability to handle large sized design implementation tasks & architectural tasks alone. Ability to assess Customer's Design environment, to understand his application needs & to build new Design environment based on specifications & available Cadence tool technology.
4) Ability to acquire a basic understanding of the (services) business environment of Cadence within 1 month. Feeling responsible for technical delivery as well as business development & opportunity creation.
5) Behavioral competencies: Teamwork; Customer focus; Accountability; Communication; Coaching & feedback; Leadership

Job Requirement
Essential Qualifications:
- MS degree with 10+/7+ years of applicable experience in electrical engineering, microelectronics.
- Essential that the individual demonstrates strong communication, verbal and written, and project management skills.
- Good verbal and written communication skill in English is needed.

Desirable Qualifications:
- Will have demonstrated hands-on experience and expertise with Cadence logical and physical design tools ( SoC Encounter, Conformal, QRC, Vstorm, ETS/CNDC, PVS) or equivalent tools, flows and methodologies required to execute a physical design project.
- Will have demonstrated successful completion of 5+ physical chip implementation projects through to tape (better to have 65nm or hierarchical implementation experience) as an individual contributor
- Will have demonstrated successful completion of at least ten physical design projects as a technical leader.
- Is able to work on-site at customer premises, travel up to 30%, and put in long hours when required to meet customer deadline.
- Experience in sign-off tools for STA, IR drop, power analysis, SI analysis is a plus
- Knowledge and experience in design for advanced process nodes (40nm and below) is a plus.


Job  Title:        Principal Product Engineer (Analog Design)
                        
Position Description:        
* Focus on customers applying Cadence Virtuoso Layout tools technologies
* Work with R&D to develop and validate state of the art layout, routing and custom design
* Provide technical feedback to R&D and Marketing to improve product capabilities, effectiveness and performance of solutions through all Cadence Custom IC tools. Work with engineering to identify fixes and workarounds for customer issues
                                
Position Requirements:        
* Experience in custom layout design or EDA industry experience. Expertise using Cadence Virtuoso layout tools or similar; programming proficiency in SKILL or similar language, tcl and Unix/Linux shell scripting; strong communication and teamwork skills
* Preferred: MSEE with around 8 years experience including advanced node designs with 65nm or smaller process rules. Previous experience of custom IC contract, simulation and physical verification a plus. Previous field application, consulting or customer facing experience also plus

If youhave interest, PLS send your update CV to colinh@cadence.com
发表于 2013-3-13 21:55:51 | 显示全部楼层
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