Cadence is looking for IC design and design services Engineer

kengteng

SOC-R Physical Design Team

Position: Lead Physical Design Engineer

Location: Shanghai

Position Description:

-Perform physical designimplementation, including synthesis, floor planning, power grid design, placeand route, clock tree synthesis, timing closure, power/signal integritysignoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure,and physical design project management.

-The candidate will have theopportunity to work on many varieties of challenging designs, i.e. low powerand high speed design. The responsibility includes participating in or leadingnext generation physical design, methodology and flow development.

                                                         

Position Requirements:         

1.BS degree with 10+ years ofapplicable experience, MS degree with 7+ years of applicable experience inelectrical engineering, microelectronics.

2.Experienced with ASIC design flow,hierarchical physical design strategies, methodologies and understand deepsub-micron technology issues.

3.Solid knowledge on LP Design, DFT,static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification,physical verification, DFM.

4.Successful track records of tapingout complex, 65/40/28 nm SOC chips.

5.Automation and programming-minded,solid coding experience in Makefile/Tcl/Tk/Perl.

6. Self-motivated, able to workindependently or as a team player, excellent verbal and written communicationskills in English.

If you have interest, PLS send yourCV to zhangyl@cadence.com

SOC-R Design Services Team

Position: Lead Implementation Services Engineer

Location: Shanghai

Position Description:

1.The candidates should be senior ina way that they are not only technical excellent but also mature & able tocommunicate with customers, following team members.

2.This engineer should have excellentdesign experiences in the digital implementation domain including Floorplan,P&R, STA, Physical verification, DFM.

3.The engineer must have a solidbackground in circuits, electronics & physics & should be very willingto learn new stuff.

Key Accountabilities:

1.Ability to handle large sizeddesign implementation tasks & architectural tasks alone. 2.Ability toassess Customer's Design environment, to understand his application needs &to build new Design environment based on specifications & available Cadencetool technology.

3.Ability to acquire a basicunderstanding of the (services) business environment of Cadence within 1 month.

4.Working on multi person projects ofvarying complexity, working especially in a multi-site/multi-cultural project.The latter requires good communication skills in English. 5.Feeling responsiblefor technical delivery as well as business development & opportunitycreation. Behavioral competencies: Teamwork; Customer focus; 6.Accountability;Communication; Coaching & feedback; Employee development; Leadership.

                                                         

Position Requirements:         

1.BS degree with 10+ years ofapplicable experience, MS degree with 7+ years of applicable experience inelectrical engineering, microelectronics.

2.Essential that the individualdemonstrates strong communication, verbal and written, and project managementskills.

3.Requires good communication skillsin English.

If you have interest, PLS send yourCV to zhangyl@cadence.com

daboboxiao

回复 1# kengteng


   请问有没有应届的职位啊？

kidsmate

要求达不到。。。。