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北京急招:
QQ:473421885
数字后端设计工程师 工作性质:全职 工作经验:3-5年 学历:硕士以上 语言能力:英语 良好 Work with global Front-End design team and physical design team for ASIC chip physical implementation. Focus on physical design including block level (full chip) floor planning, timing closure, place&route, physical verification etc. Job Requirement 1. MSEE with 3+ years or Bachelor with 5+ years of industrial experience in ASIC design 2 Familiar with Back-End (physical design) EDA tools Expertise in place and routing, signal integrity, power analysis, CTS design, DFT, design rule and connectivity verification, timing closure. 3 Knowledgeable in all aspects of deep submicron ASIC design flow .Successfully gone through complete product development cycle. 4 Good analytical and debugging skills 5 Good listening, writing and speaking English. 6 Good communication skills, strong interpersonal skills and the flexibility. Dedicated, hard working and good team player
可直接发简历至:carry.wang@yaxunhr.com |