AMD(超威半导体)上海热招 - 3月更新

RecruiterAMD

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	Job Title	Requirement
1	SMTS Digital ASIC/SoC Verification Engineer	1. Deep understanding on ASIC/SOC design flow 2. Excellent knowledge of design verification methodology, such as VMM or OVM. 3. Solid experiences with simulation model creation and the testbench build 4. Strong RTL coding with Verilog 5. Strong C/C++ software development experiences 6. Be good at scripting language, such as Perl, C shell, Makefile.
2	Sr. ASIC Design Methodology Engineer - STA	*extensive Primetime experience is a must * extensive script experience is a must (Perl/Python/TCL), C programming experience is also OK * design experience or Synthesis experience with DC/RC is a plus * analytic skills and problem solving skills * good English is speaking is a plus
3	Sr. ASIC Verification Methodology Engineer	-Good written and fluent oral English -Graduates from Electrical Engineering (EE) or Computer Science (CS) -Master with 3+ working experience, or Bachelor with 4+ working experience -Familiar with Linux Environment (including shell scripting and linux gnu tools) -Scripting language experience a plus (perl, ruby, tcl, etc.) -Experience with design verification methodologies (plus) -Major in EE required: n3+ year experience on Verilog HDL coding and debugging n2+ year experience on c/c++ nFamiliar with SystemVerilog -Major in CS required: n3+ year experience on c/c++ n1+ year experience on Verilog HDL coding and debugging (plus) nFamiliar with SystemVerilog or SystemC (plus)
4	Sr. ASIC Verification Engineer - GateSim	-Background in Electrical Engineering(EE) or Computer Science(CS) field -Familiar with Linux Environment (including shell scripting and linux gnu tools) -Experience with ASIC design or verification -Understand low power design flow is a plus -Experience on verilog HDL coding and debugging -Experience on C/C++ programming and debugging(plus) -Familiar with script(perl, tcl) program and makefile(plus) -Familiar with SystemVerilog or SystemC (plus) -Good written and fluent oral English -Good communication skill and teamwork spirit
5	Sr./MTS Design Verification Engineer for Graphics Hardware	-Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+ years working experiences -Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification -Needs to have better understanding of Verification methodology and concepts. -Should have good understanding of Pre-Silicon design process from Architecture, Design, Synthesis and Gate level Implementation till Tapeout release. -Should have excellent communication skills (both written and oral) and should be able to participate cross functional engineering teams geographically. -Familiar with Linux Environment (including shell scripting and linux gnu tools) -Advanced programming knowledge on Verilog,C++ -Design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.) -Strong problem solving skills
6	Senior/MTS Engineer of GFX Verification – Graphics(also have sect. manager opening)	-Master or above, major is CS, EE or Math. -Has more than 3-5 year of experience on OpenGL/OpenCL/Cuda/D3D programming- Deeply Understands the graphics pipeline -Has Zeal for knowledge inside the Graphics Core -Has knowledge of DX9-DX12 is an option -Has experience in algorithm modeling for Graphics Core is an option. -Familiar to graphics algorithm like rendering/shader is an option -Interesting in the verification work for graphics pipeline. -Strong program/debug ability on c/c++. -Familiar to linux env/script is a big plus.
7	Sr. Design Engineer of GPU IP - Graphics	-MS degree of EE with 5+ years working experience in ASIC Company.   -Expert of Verilog RTL design and has experience of large digital ASIC project. -Familiar with front-end EDA tools and flows. -Familiar with C/C++ programming and unix/linux and scripts (tcl, perl etc.) -Fluent English on talking, presentation and writing documents.   -Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager. -Can solves complex, novel and non-recurring problems; initiates significant changes to existing processes/methods and leads development and implementation -Possesses specialized knowledge of Computer architecture and computer arithmetic -Possesses specialized knowledge of Computer graphic knowledge
8	GPU Computer Architect(Performance Verification)	More than 5 years’ experience with one of following: a) Software: OGL/D3D driver background b) 3D/GPU Architecture c) IC Design/verification Background d) GPU design/verification e) 3D Application programming etc. f) Compiler Back Ground g) Graphics Architecture h) GPGPU related jobs Preferred Experience: -Master Degree or Above -5+ year experience on C\C++ -Plus with experience on CPU Design/Verification -Plus with experience on Compiler -Plus with 3+ years’ OpenGL/D3D programming experience -Plus with 3+ years’ OpenGL/D3D driver experience -Plus with 1+ years’ Linux/Shell -Plus with 1+ years’ Perl/Python -Familiar with Graphics Algorithm/Graphics Pipeline -Proficient in English read/write/speaking/listening -Good communication & Team worker
9	Sr./MTS GPU Integration Engineer	-MS degree of EE with more than 5 years working experience in ASIC Company.   -Familiar with Verilog RTL design and has experience of large digital ASIC project. -Experience for ASIC tapout and bring up. -Fluent English on talking, presentation and writing documents.   -Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.
	Back-end
10	Senior ASIC Design Methodology Engineer – FCFP/TDFP	* physical design experience * extensive FCFP/TDFP experience * analytic skills and problem solving skills * good English is speaking is a plus
11	Senior/MTS Physical Design Engineer (also have sect. manager role)	-MSEE with 8+ years or Bachelor with 10+ years of industrial experience in ASIC design -5+ years or more years of experience in physical design of deep submicron digital ASIC chips -Hands on experience in large scale ASIC chip physical design -Knowledgeable in all aspects of deep submicron ASIC design flow -Successfully gone through several complete product development cycles -Demonstrate strong leadership and work well with cross-functional teams -Good listening, writing and speaking English -Good communication skills, strong interpersonal skills and the flexibility -Dedicated, hard working and good team player -Familiar with Back-End (physical design) EDA tools -Familiar with Front-End EDA tools is a plus -Familiar with Unix/Linux environment and good at scripts

RecruiterAMD

有没有Graphics背景的同学啊？以下职位急缺

Senior/MTS Engineer of GFX Verification – Graphics
(also have sect. manager opening)

-Master or above, major is CS, EE or Math.
-Has more than 3-5 year of experience on OpenGL/OpenCL/Cuda/D3D programming-
Deeply Understands the graphics pipeline
-Has Zeal for knowledge inside the Graphics Core
-Has knowledge of DX9-DX12 is an option
-Has experience in algorithm modeling for Graphics Core is an option.
-Familiar to graphics algorithm like rendering/shader is an option
-Interesting in the verification work for graphics pipeline.
-Strong program/debug ability on c/c++.
-Familiar to linux env/script is a big plus.

RecruiterAMD

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RecruiterAMD

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